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MatchFilter
- Quartus Ⅱ开发环境，VHDL语言实现扩频通信的匹配滤波功能。用于匹配滤波器的FPGA实现！
18a
- 匹配滤波器设计，VERILOG实现的，比较好的哦-Matched filter design, VERILOG implementation, and better oh
VHDL_DMF
- Vhdl实现扩频通信匹配滤波器，书上打下来的,打了好久.-VHDL realization of spread spectrum communication matched filter, books, playing down, playing for a long time.
PN_code_capture_and_tracing
- 一个完整的pn码捕获与跟踪的VHDL源码,并行匹配滤波器捕获,锁相环跟踪.-A complete pn Code Acquisition and Tracking of the VHDL source code, parallel matched filter to capture, phase-locked loop tracking.
2046matchedfilter
- 2046点匹配滤波器，附带C/A码生成模块一个-2046 points, matched filter, with C/A code generation module 1