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simulink_labs
- This project allows you to learn communication systems in greater depth. It contains the Simulink files (*.mdl) which are block design files of various communication systems such as AM, DSB-SC, FM, PLL, Data Acquisition, Digital Data Transmission, PC
singnal
- VHDL实现通用通信信号源，包括sin，cos，方波，三角波，BPSK，GMSK，ASK，16QAM等信号的产生以及DDS，PLL的VHDL系统代码-VHDL implementation of universal communication sources, including sin, cos, square, triangle, BPSK, GMSK, ASK, 16QAM and other signal generation and DDS, PLL system, the VHDL
Template
- C8051F120的串口通信，有命令格式，有超时检测，有校验和功能，使用了PLL提升了系统频率。经过测试。有端口和使用说明文件，工程文件完整，移植方便。使用下面的功能：UART RS232 PLL GPIO Timer-C8051F120 serial communication, a command format, a time-out detection, a checksum function, use the PLL to enhance the system frequency. Te
simulink_labs
- 包括了对不同通信系统的simulink仿真，如AM, DSB-SC, FM, PLL, Data Acquistion, Digital Data Transmission, PCM and Delta Modulation。通过这些可以帮助用户对通信仿真有更深的理解。-This project allows you to learn the communication systems in greater depth by giving you the reins to play wit
PLL
- 锁相环路的基本工作原理 PLL basic working principal-The basic working principle of PLL PLL basic working principal
simulink_communicationsystems
- 文件中包含有AM, DSB-SC, FM, PLL, Data Acquisition, Digital Data Transmission, PCM和Delta Modulation的simulink环境下的实现 -This project allows you to learn the communication systems in greater depth by giving you the reins to play with it ! It contains the simu
c6_PLLpre
- 现代通信系统仿真中锁相环仿真的PLL前处理程序-Modern communication systems simulation of the PLL phase-locked loop simulation procedures before
c6_PLLsim
- 现在通信系统仿真中的锁相环技术，给出仿真程序以及后处理-Communication system simulation is now PLL technology, the simulation process and post-processing
qpsk_PLL
- QPSK的锁相环程序，在MATLAB环境下编写的，用来进行QPSK通信系统的仿真和实际信号载波同步的提取-QPSK PLL program, written in the MATLAB environment, QPSK communication system used for simulation and the actual extraction of the signal carrier synchronization
8616039-PLL-Design-Part-2
- Phase-Locked Loops for High-Frequency Receivers and Transmitters–Part 2 by Mike Curtin and Paul O’Brien The first part of this series of articles introduced the basic concepts of phase-locked loops (PLLs). The PLL architecture and princip
PLL
- 锁相环通信系统仿真 包括预处理，仿真引擎，以及后处理-PLL communication system simulation including pre-processing, simulation engines, and post-processing
smdk2413_application_note_rev10
- SMDK2413 (Samsung MCU Development Kit) for S3C2413X is a platform that is suitable for code development of SAMSUNG s S3C2413X 16/32-bit RISC microcontroller (ARM926EJ-S) for hand-held devices and general applications. The S3C2413X consists of 16-/32-
suoxianghuan
- 通信系统中锁相环的实现及其原理,同过matlab编程实现-communication system and PLL relazition
E5_2_LoopDesign
- 基于matlab的关于通信系统中解调中载波锁相环的设计-On the design of the PLL demodulation in communication system of based on MATLAB
MPC5634M-eSCI-PLL-getchar-CW29
- MPC5634串行通信接口例程，已在开发板上调试成功，可以直接使用。-MPC5634 serial communication interface routines, has been in development board debugging success, it can be used directly.
MC9S12G128-Hands-ON
- MC9S12G128单片机AD、PWM、PLL、CAN通信等例程-MC9S12G128 SCM AD, PWM, PLL, CAN communication routines
Hittite-PLL-Design-Installer-v1p1
- Hittite公司以创新的设计使得其PLL产品性能优异，在相位噪声，杂散方面有着卓越表现，其芯片的高集成度使得外围电路简单，设计方便。所以随着电子技术的发展，对频率源的相位噪声性能要求越来越高，Hittite的低相位噪声PLL，在物理、天文、无线电通信、雷达、航空、航天以及精密计量、仪器、仪表等各种领域里都将大有用武之地。-The Hittite companies with innovative design makes the PLL excellent product performan
stm32
- 用STM32F103采用SPI的方式实现与ADF4351的通信 ，实现锁相环芯片的控制(The communication with ADF4351 is realized by using SPI in the way of STM32F103, and the control of the PLL chip is realized)
dds_AD9834+rw
- dds9834通信控制,配i和FPGA控制和pll可以得到频率的捷变(dds9834 communication control, with I and FPGA control and PLL can get frequency agility)