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FM-ok
- VHDL编写的驱动DDS，ad9850的程序，用于产生FM波
DDS_信号源
- dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
fpga
- VHDL写的fpga程序，可产生三角波，方波据此波，正弦波，可实现任意频偏的调频，调相，调幅-Fpga write VHDL program can generate triangle wave, square wave accordingly wave, sine wave, can achieve any frequency offset of the FM, PM, AM
Digital-FM-transmitter-VHDL-coding
- it is VHDL code for Digital fm modem transmitter block.
kuoping
- fpga嵌入式设计 扩频接收机设计 有matlab 和vhdl 对比情况-Design of spread-spectrum receiver embedded FPGA design and VHDL contrast matlab
simple_fm_receiver.tar
- 一个简单FM接收机的VHDL源码，很有参考意义-A simple FM receiver VHDL source code is very useful
dds_9760_ALL1
- DDS频率精确步进100HZ，拔码选择FSK，PSK，FM，ASK功能。-dds base on vhdl
dds_9760_OK
- ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequen
dds
- 如何利用FPGA产生DDS调频信号 很具体的-How to make use of DDS generated FM signal FPGA specific
vhld_fpga_box
- Verilog 编写的波形发生器，可发生正弦波，三角波，方波，可以调频-Prepared Verilog waveform generator, can occur sine, triangle wave, square wave, you can FM
dds
- 基于DDS的调频调相 通过改变频率控制字来控制 程序编译过 搭过硬件 可以实现-FM Based on DDS phase modulation by changing the frequency control word to control the program compiled the hardware can be achieved take-off
fm
- VHDL设计全数字FM接收机 资料大小：650KB 运行环境：Windows -VHDL design of all-digital FM receiver Data Size: 650KB operating environment: Windows
FMreceiver
- FM receiver VHDL code
matlabfile
- many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation-many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation
all_digital_fm_receiver_latest
- Fm receiver using DP-Fm receiver using DPLL
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
cordic_atan
- 用verilog语言实现计算反正切函数，在软件无线电中解调PM/FM中使用的尤为频繁。上传的压缩包是modelsim工程，基于6.5c,里边包含一个完整的PM波产生以及解调过程的matlab文件仿真，并取其中间的I和Q支路做为verilog文件的输入，并将其借条输出与MATLAB实际解调输出作比较。 鉴相器的设计基于CORDIC算法，其精度取决于迭代的深度。由于工程实际运用只需要解调出atan值，并不需要绝对的值，所以并没有给予加权，需要的同学可以自己加上。-Calculated usin
all-digital-fm-receiver
- all digital fm receiver using vhdl programming language project for electronics and communication engineering students.
code
- it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm
FM
- 在quartus ii下完成的用VHDL语言编写的数字式调频系统-Accomplished in quartus ii the use of VHDL language digital FM system