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ug_virtual_jtag_design_example 包含两的关于Virtual JTAG的应用实例
- 包含两的关于Virtual JTAG的应用实例，可以为Virtual JTAG操作提供借鉴。,Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
PIPE_LINING_CPU_TEAM_24
- 采用Quatus II编译环境，使用Verilog HDL语言编写实现了五段流水线CPU。 能够完成以下二十二条指令（均不考虑虚拟地址和Cache，并且默认为小端方式）： add rd,rs,rt addu rd,rs,rt addi rt,rs,imm addiu rt,rs,imm sub rd,rs,rt subu rd,rs,rt nor rd,rs,rt xori rt,rs,imm clo rd,rs clz rd,rs slt rd,rs,rt sltu rd,
smart
- 这个一个好和序，一个美丽学校的虚拟现实，此程序很好！-This a good and order, a Beauty School of virtual reality, this program very good!
computer4
- 基于FPGA的CPU核及其虚拟平台的设计与实现-FPGA-based CPU core and its virtual platform design and implementation of
ug_virtual_jtag_design_example_2
- 包含两的关于Virtual JTAG的应用实例，可以为Virtual JTAG操作提供借鉴。-Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
UART
- A simple preoteus based design to display the characters typed int the keyboard into LCD using UART of 8051.Plz make sure that TTL to RS232 is inserted in between the microcontroller and virtual terminal which is not shown in the design.
vc
- virtul channel 虚拟通道 用于改善noc的死锁效应-virtul channel virtual channel used to improve the effect of noc Deadlock
Sdram_Control_2Port
- 双端口SDRAM控制器，将SDRAM虚拟成两个端口，已经在ALTER DE2开发板的硬件上验证通过，采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
VLAN_data_process
- VLAN虚拟局域网的数据收发详细过程 图文并茂-VLAN Virtual LAN data transceiver illustrated detailed process
vmware-1
- 一个虚拟机的全部注册教程我都舍不得上传的-All up a virtual machine I am reluctant to upload tutorial
PipelineCPU
- 用Verilog HDL语言或VHDL语言来编写，实现多周期CPU设计。能够完成以下二十二条指令。（均不考虑虚拟地址和Cache，并且默认为大端方式）： add rd, rs, rt addu rd, rs, rt addi rt, rs, imm addiu rt, rs, imm sub rd, rs, rt subu rd, rs, rt nor rd, rs, rt xori rt, rs, imm clo clz slt rd, rs, rt
mulitcpu
- 用verilog HDL语言或者VHDL语言来编写，实现多时钟周期CPU的设计。能够完成以下二十二条指定（均不考虑虚拟地址和Cache，并且默认为小端方式）： add rd, rs, rt addu rd, rs, rt addi rt, rs, imm addiu rt, rs, imm sub rd, rs, rt subu rd, rs, rt nor rd, rs, rt xori rt, rs, imm clo clz slt rd, rs,