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autosale
- VHDL编写的自动售货机，带找零、退币功能，数字电路课程设计！内附常态图，和dofile波形模拟文件-VHDL prepared by the vending machines, have sought to bring, the coin features, digital circuit design courses! Enclosing normal map and document dofile waveform simulation
trafficlight
- VHDL编写的交通灯程序，有倒计时功能，数字电路课程设计，内附状态图和dofile波形模拟！-VHDL prepared by the traffic lights procedures, the countdown function, digital circuit design courses, enclosing a state map and dofile waveform simulation!
gongchengsheji-477
- 基于logmap算法的vhdl的实现。 通信系统的log—map算法数字vhdl的实现-logmap algorithm based on the achievement of VHDL. The communication system log-map algorithm to achieve the number of VHDL
110detector_lab
- 一个简单的探测110三位的探测器，用逻辑图和vhdl描述，包括实验报告和测试图。-a simple survey of 110 three detectors, and a logical map vhdl descr iption, including reports and experimental test plan.
000000adada2
- 数据结构，二叉树和哈夫曼编码。C++ 1、 学会针对DFA转换图实现相应的高级语言源程序 ·a C++ Class Library of Cr ·简单的防火墙，可以用来学习，作为毕业课设也相当有帮 ·实现ARM 芯片的一对PWM 输出用于控制直流电机 ·Programming the Microsoft ·VC调用java的简单例子。需要注意jvm.dll ·这是介绍在VC++6。0下如何编写GPIB程序。有 ·GPS坐标转换软件：直角坐标与大
jiaotongdengcodes
- 实例制作的一个有关交通灯的VHDL代码，从各模块到顶层文件的代码一一列出，详细周到，附带仿真波形图和芯片管脚锁定的相关内容，绝对物超所值。-produced an example of the traffic light VHDL code, from the module to the top of the document sets out a code on January 1, thoughtful details, fringe simulation waveform map and
aes
- aes的加密解密算法的源代码以及测试源代码和仿真结果图-aes encryption decryption algorithm source code and test source code and simulation results map
wavegenerator
- 开发环境为QuartusII，能产生正弦波、三角波、方波和锯齿波，幅度为5V，采样为8位，在开发板已经验证通过，有详细的波形图和管脚分配图。-Development environment for QuartusII, can generate sine wave, triangle wave, square wave and sawtooth wave, ranging from 5V, sampling for 8, in the development board has to verif
CAN_design
- 实现can总线的硬件布线图，在protel上直接打开即可，按此图的实物板已制出，可确保无误。-The realization of the hardware can bus wiring diagram, in Protel can directly open, this physical map has already been produced to ensure accuracy.
MPpinfigure
- 手机硬件图，夏新手机芯片pin脚位置说明-Cell phone hardware map, Amoi cell phone chip pin pin position descr iption
mux21a
- 2选1多路选择器的VHDL完整描述，即可以直接综合出实现相应功能的逻辑电路及其功能器件。图6-1是此描述对应的逻辑图或者器件图-2 election more than one MUX complete descr iption of the VHDL, which can be directly integrated to achieve the corresponding function logic devices and their functions. Figure 6-1 is th
bb
- CPLD可编程逻辑芯片上实现信号发生器的方法和步骤，系统采用自顶向下的设计方法，以硬件描述语言VHDL和原理图为设计输入，利用模块化单元构建系统。-CPLD programmable logic chip Signal Generator methods and steps system uses top-down design approach to hardware descr iption language VHDL and principles of map design input,
fangzhen
- 卷积码和循环码的verilog编码以及仿真结果图，-Convolutional codes and cyclic codes and the coding verilog simulation results map
butterfly
- 计算离散傅里叶变换的一种快速算法,简称FFT。快速傅里叶变换是1965年由J.W.库利和T.W.图基提出的。采用这种算法能使计算机计算离散傅里叶变换所需要的乘法次数大为减少,特别是被变换的抽样点数N越多,FFT算法计算量的节省就越显著。 -Discrete Fourier transform calculation of a fast algorithm, referred to as FFT. Fast Fourier Transform in 1965 by JW Cooley an
Logistichecat
- 将猫映射(cat map ) 与Logist ic 映射相结合, 构造了一种语音加密算法. 该算法首先将语音数据堆叠成二维, 然后利用二维猫映射将数据的位置置乱, 最后利用一维Logist ic 映射构造替换表, 对数据进行扩散.-The cat map (cat map) and Logist ic mapping the combination of a voice encryption algorithm is constructed. The algorithm first voic
ys
- 两路单极性HDB3+和HDB3-信号，经映射模块后完成单极性到双极性信号的数字转化，该模块由设计文件ys.v完成。由于映射后得到的是双极性归零码，通过该模块得到双极性非归零码。该模块由设计文件delay.v完成-Two unipolar HDB3-signals HDB3+, and by the mapping module to complete unipolar to bipolar signal digital conversion, the module completed by th
turbocodes_latest.tar
- Turbo Codes - max lop map algorithm
sunset-vhdl
- 小精灵自爆：采用64*4位ip核并随机赋值作为地图信息，小精灵具有一定血量，可以在地图上面根据周围敌人（赋值为1)数量和自己血量选择是否进行自爆。-Elf blew: 64* 4 ip nuclear and random assignment as the map information, the elves have a certain amount of blood, the map above surrounding enemies (a value of 1) the number a
VHDL
- dsp-2812VHDL的源代码，里面有map文件、等等 有用的知识-dsp-2812 VHDL source code, there are map files, etc. Useful knowledge
project.map
- D Flip Flop for Single Bit Store