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MAX_II_board_schematics.pdf
- MAXII开发板原理图． Revision Index & Table of Contents MAX II and Pereipherals PCI USB and Power Supplies Prototyping Area-MAXII development board schematics. Revision Index
MAX_II_board_schematics
- Altera MAX II 开发板原理图-Altera's MAX II development board schematics
CPLDxiaoche
- 智能机器小车主要完成寻迹功能，由机械结构和控制单元两个部分组成。机械结构是一个由底盘、前后辅助轮、控制板支架、传感器支架、左右驱动轮、步进电机等组成。控制单元部分主要由主要包含传感器及其调理电路、步进电机及驱动电路、控制器三个部分。本设计的核心为控制器部分，采用Altera MAX7000S系列的EPM7064LC84-15作主控芯片。CPLD芯片的设计主要在MAX+plusⅡ10.0环境下利用VHDL语言编程实现。驱动步进电机电路主要利用ULN2803作为驱动芯片。 -intelligent
C_10
- VHDL实例,在MAX+Plus+II下开发-VHDL example, the MAX II Plus under development
an485_design_example
- AN485_CH-MAX II CPLD 中的串行外设接口主机（verilog SPI）
an500_CN
- 利用MAX II CPLD 实现 NAND 闪存接口
FT245BM
- 这是一个在MAX II CPLD利用FT245BM 模块实现USB传输的读写程序，用的是Verilog HDL语言
altera_epm1270_MAX.rar
- 一个ALTERA公司EPM1270 cpld的实验板原理图，其中有PCI接口电路，PDF格式,A ALTERA Corporation EPM1270 cpld schematic diagram of the experimental board, including PCI interface circuit, PDF format
Max_PlusII_ppt.rar
- Max+Plus II 的ppt文档，看后可以很轻易上手Max+Plus II,Help
MAXplusIICrack.rar
- MAX+plus II FPGA CPLD开发软件完美无限制破解版,MAX+ plus II FPGA CPLD development software cracked unlimited version of the perfect
MaxplusII.rar
- 本电子书详细地介绍了VHDL语言开发环境 Max+plus II 软件的使用方法，让新手很快学会如何使用本软件,This book describes in detail VHDL language development environment Max+ plus II software to use, so that novices will soon learn how to use the software
MAX_II_using_the_example_of_the_UFM_block
- BJ-EPM240V2实验例程以及说明文档实验之十四MAX II的UFM模块使用实例-BJ-EPM240V2 experimental test routines as well as documentation of the MAX II 14 UFM module uses examples
0097
- MAX+plus II编译的模30加法计数器，简单的与非门组成！-MAX+ Plus II compiler module adder 30 counters, a simple composition with the non-door!
WATERHOURMETERBASEDONVHDL
- 在 MAX+PLUS II开发环境下采用 VHDL语言 设计并实现了电表抄表器 讨论了系统的四个 组成模块的设计和 VHDL 的实现 每个模块采用 RTL 级描述 整体的生成采用图形输入法 通过波形仿真 下载芯片测试 完成了抄表器的功能-In the MAX+ PLUS II development environment using VHDL language design and implementation of the meter meter reading device to di
MAXII
- 功耗是前一代CPLD系列的十分之一――MAX II器件的动态功耗很低，所以运行功耗较低。MAX II系列功耗是低成本MAX 3000A系列的十分之一。-Power generation CPLD family of the former one-tenth- MAX II device' s dynamic power consumption is very low, so low-power operation. MAX II family of low-cost, power cons
epm1270iopin
- 功耗是前一代CPLD系列的十分之一――MAX II器件的动态功耗很低，所以运行功耗较低。MAX II系列功耗是低成本MAX 3000A系列的十分之一。-Power generation CPLD family of the former one-tenth- MAX II device' s dynamic power consumption is very low, so low-power operation. MAX II family of low-cost, power cons
1
- Designing with MAX+PLUS II，可以下载下来，作为了解用-Designing with MAX+ PLUS II, can be downloaded and used as a knowledge
MAX_II_examples_of_internal_shocks_clock
- BJ-EPM240V2实验例程以及说明文档实验之十三MAX II内部震荡时钟实例-BJ-EPM240V2 experimental test routines as well as documentation of the MAX II 13 examples of internal shocks clock
fir-filter-design-using-fpga-with-MAX-Plus2
- 基于FPGA的高阶FIR滤波器设计用max-plus －II软件仿真-fir filter using fpga with max-plusII
an496_design_example
- MAX II that having account in so they can help you to get your files. But to prevent overloading and abusing; We have some. ers that having account in so they can help you to get your files. But to prevent overloading and abusing; We have some.