搜索资源列表
MC145152
- 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
frequencySynthesis
- 频率合成器环路滤波器的设计，介绍由集成锁相芯片PE3236 和集成锁相芯片ADF4107 组成的单环锁相环常用的环路滤波器。-Frequency synthesizer loop filter design, introduced by the integrated phase-locked-chip phase-locked PE3236 and an integrated single-chip component Central ADF4107 PLL loop filter common
PLL
- PPL讲义，关于鉴相器方面的技术资料，对于用单片机编程有好处。-PPL notes, phase detector on the technical information, good use of single-chip programming.
PhaseLockedLoop
- This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both
shuanglushuzihecheng
- 摘要 电能表作为用电量的测量工具广泛的应用于各种场合。在电能表校表系统中,需要的最基本的输入信号源是高精度双路正弦信号源,并要求可对其频率、相位、幅值进行调节,来对电能表进行校准。 基于单片机的程控信号源设计，运用数字调相、数字调幅和数字调频等技术，要求实现相位、幅度、频率的高精度程控调节。本文设计了一种利用锁相环频率合成技术和数字波形合成技术组成的程控低频正弦波信号发生器，并给出了调幅、调频、调相的实用电路，频率调节通过改变8253计数器的分频系数来实现；相位调节由51单片机预置计数器
DesignoftrackingloopofGPSsoftwarereceiver
- 本文在分析GPS 软件接收机跟踪原理的基础上，首先比较码环与载波环不同鉴相器的性能，然后对二阶锁相环中不同环路参数设下的跟踪效果进行仿真分析，最后设计 了合适的码环与载波环路，并用实际采集的GPS 数据论证了所设计环路的有效性，为GPS 软件接收机跟踪环路的设计提供了参考。-Based on the analysis of GPS receiver tracking software on the basis of the principle, first compare the diffe
PV-inverter-(mppt-pll-pid)
- 基于DSP的单相光伏并网逆变器全部源代码，包括锁相环PLL,mppt,pid控制程序,希望对大家有帮助!-DSP single-phase photovoltaic grid-connected inverter with full source code, including the phase-locked loop PLL, mppt, pid control procedures, we hope to help!
2012.4.26-SD5duoji-pinlvceshi
- 2012.4.26-SD5舵机频率测试，飞思卡尔 智能车比赛 舵机测试频率 源程序，包含了对飞思卡尔s12xs128单片机相应模块的初始化设置，如锁相环PLL，pwm，PIT,以及PID参数的整定。-2012.4.26-SD5 Servo Frequency Test, Freescale Smart Car Competition steering gear test frequency source that contains initialization settings on the F
pll
- 单载波 BPSK QPSK调制下的PLL功能实现 实现频率相位的跟踪-Single carrier BPSK QPSK modulation the PLL frequency phase tracking
pll_carrier_syn
- 本程序是锁相环的仿真程序，具有接收端载波同步的功能。注释详尽，程序规范。发端的调制方式有单载波调制，BPSK调制，QPSK调制可供选择。程序中有星座图，锁相环的频差、相差图，以及解调后的基带波形。-This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications.
inventer_8_26
- 该程序是我硕士毕业论文《单相并网逆变器》源程序，调试成功的。（直流直接逆变为交流的单相全桥逆变拓扑，有离网并网功能，锁相环过零检测再采用PI.）-This program is my master' s thesis, " single-phase grid-connected inverters," the source, debugging success. (DC-AC inverter direct single-phase full-bridge inverte
PLL_ceshi
- 单相信号的锁相功能实现（PLL），自动跟踪单相电网信号。-Single-phase signalof thelock-infunctions to achieve(PLL),automatic trackingof single-phasepowersignals.
SPLL
- 较为详细地介绍了单同步坐标系软件锁相环，采用了单一的同步坐标系锁相控制结构，一般适用于电网电压平衡时的相位，频率及幅值的检测，以及用于多种控制结构中（下垂控制，PQ控制，双闭环控制）。-A more detailed descr iption of the principle of a single coordinate system PLL synchronization and setting PI controller parameters. SPLL with a single sync
finalmay10.slx
- A PLL-Less Scheme for Single-Phase Grid Interfaced Load Compensating Solar PV Generation System
SinglePhaseLockLoop
- single phase voltage PLL,simulink simulation model
pll
- 基于PSIM的锁相环。可以放在任何PSIM的模型，例如三相并网和单相的也可以的-Phase Locked Loop Based on. Can be placed in any PSIM model, such as three-phase and single phase can also be
ADF4110_4111_4112_4113
- 基于单片机的锁相环编程，锁相环可用于倍频和锁相。(PLL programming based on single chip microcomputer, PLL can be used for frequency doubling and phase locking.)
PLL_D
- 用51单片机控制锁相环PLL输出不同频率的正弦信号(The phase-locked loop PLL is controlled by 51 single-chip microcomputer to output sinusoidal signals of different frequencies)
MINI_INV_v1
- 自己毕设用的单相并网逆变器程序，使用的是TI公司的DSP28335，包括了锁相环PLL，PR控制等子程序(The program of single-phase grid-connected inverters is designed by ourselves. It uses TI's DSP28335, including PLL, PR control and other subroutines.)