搜索资源列表
8051 Counter 0 Example Program
- 8051单片机的计数器0的操作程序源代码-8051 0 counter the source code for the procedure
counter
- 1.40种记数器图片样式自由选择，并且可以方便地增加记数器图片样式。 2.可以设置计数器显示数字,显示位数,计数器是否隐藏等。 3.页面显示记数和唯一IP记数两种记数模式。 4.可以记录来访客的来源IP地址和来源页面信息,在线人数。 5.每月、每天和每小时的访问数据统计。 6.搜索引擎统计，还可以自己定义搜索引擎。 7.注册用户找回密码功能。 8.多用户计数器，具有管理注册用户功能。 9.系统会自动删除过多的以前的无用的来源和在线记录，保证系统快速稳定运行,还可以
people-counter.rar
- 基于16f877的单片机人数统计系统源码，可统计进出门的人数，用数码管显示,16f877 microcontroller based on the number of source statistical system can go out into the number of statistics, with digital display
counter.rar
- 初学者学习modelsim的好例子，基于Verilog的计数器，带测试源码，在quartus2运行。,Modelsim beginners to learn a good example of Verilog based on the counter, with the test source code, running in quartus2.
counter
- 关于FPGA实现的几种计数器的verilog源程序-FPGA implementation of several counter verilog source code
dsasmsrc
- 一个反汇编程序源码- A counter- assembly program source code
counter
- 类似Windows的计算器的源码，小程序，初学VC＋＋的朋友可以看下-similar to the Windows source code calculators, small procedures, beginner VC++ can facie friends
CNT10_T
- 这是同步十进制计数器的源程序，有需要的同学可以参照一下！-This is a source synchronous decimal counter, needy students can refer to you!
profiles
- source code of counter,ram,lfsr etc
counter
- 通过vb与鸿格7000系列模块进行通讯，与DI通讯源码 -Vb and hung grid through 7000 Series module to communicate with the DI communication source
Counter
- 飞思卡尔单片机MC9SDG128B的计数器源程序，用于速度测量中脉冲个数统计，可以实现速度测量，路程测量等。-Freescale' s single-chip counters MC9SDG128B source for the pulse velocity measurement in the number of statistics, can achieve the speed measurement, distance measurement.
Counter7
- 实现了标准的计算器的功能，科学型的没有实现。但基本的计算都可以了。-delhpi 7 source Counter
bcd
- EDA 十进制计数器、BCD VHDL源代码-EDA decimal counter VHDL source code
Counter
- A simple java source line counter. Found it on google.
LineCounter
- 源代码的行统计工具. 支持拖拽文件夹和自定义源码类型. 非常方便易用. vc++2005环境-The source code line of statistical tools. Supports drag and drop folders and custom source types. Is very easy to use. Vc++2005 environment
counter
- 本例源代码文件由用户按照书中的操作步骤自己生成，“Example-2-1\Project_Navigator_Demo\源代码”目录下为源代码的参考文件。“Example-2-1\Project_Navigator_Demo\counter”目录下为完整的工程，包括源代码文件、综合与实现的结果文件、ISE工程文件等，可以使用ISE工程管理器打开工程，供读者参考-In this case the source code files by the user in accordance with th
digitalwatch
- Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The e
frequency-counter-pic
- C51 designed using the frequency counter, it will automatically switch range, there are testing the data source
time-counter
- 基于verilog的计时器源代码，可以通过编译-Verilog source code based on the timer, you can compile
SourceCounter-2.4.91.2
- 源代码编译工具，对各种源代码进行辅助功能。是代码编译更加流畅。-Source code compilation tools, source code for a variety of auxiliary functions. Is the code to compile more smoothly.