搜索资源列表
vhdl-core-Kopie_von_mem32_vhd
- vhdl 模块对nand flash控制，实现了FPGA对NAND FLASH直接读写控制。
IP core
- VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
turbo码 IP core
- turbo码 IP core, VHDL编写，Altera公司的，用于信道编码中turbo码的译码
jpeg.zip
- a jpeg compression core, a jpeg compression core
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
can.rar
- can IP CORE .VERY GOOD AS A STUDY FILE,can IP CORE. VERY GOOD AS A STUDY FILE
VHDL语言实现的arm内核
- 5个ram核，arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3 arm6_verilog.rar 一个最简单的arm内核，verilog写的，有点乱 arm7_verilog_1.rar J. Shin用verilog写的arm7核心，结构良好，简明易懂 nnARM01_11_1_3.zip.zip nnARM开源项目，国防科技大学牛人ShengYu Shen写的，原来放在opencores上，
uart16550
- uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b
8051
- 8051单片机VHDL内核,内有说明,很详细,值得下载-8051 VHDL core, which has made it clear that, in great detail, it is worth downloading
PIC
- 一个PIC单片机内核的VHDL实现，包含VHDL源码，说明文档-A PIC Singlechip realize VHDL core, including the VHDL source code, documentation
jiaotongdeng
- 交通灯控制系统VHDL源码，用VHDL语言、MAXPLUS2环境设计实现-VHDL core
8051-core
- mcu8051 CPU FPGA VHDL software
dianzishejishili
- 电子系统设计实例 设计语言VHDL 实验仪器 杭州康芯gw48eda 开发系统-Examples of electronic system design languages VHDL core experimental apparatus gw48eda Hangzhou Culture Development System
15-IP-core
- 15个免费的IP核 IP核源代码 -15 IP cores
vhdl-arm-core
- 用vhdl语言实现arm内核，压缩包中有19个代码共同组成这个arm内核，程序比较大，应用时要注意那个代码是顶层实体。用quartus2软件即可打开仿真。-Vhdl language used arm core, compressed package code of 19 common core component of this arm, procedures, and application code should be noted that top-level entity. Used t
vhdl-JPEG-enc
- JPEG Encoder,Here is a quite detailed low level design document for the Core: Low Level Design Document
pciug159
- XILINX ISE生成PCI-CORE时产生的用户文档,帮助编写PCI通信用户逻辑,非常有用-XILINX ISE generation PCI-CORE generated user documentation to help users prepare PCI communication logic, a very useful
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
FT2232H_USB_Core
- 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieve
xapp1022
- xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件、-xilinx FPGA platform testing by MET PCIe IP core documentation and source files