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EP1C3_12_10_PHAS
- 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
dds
- 基于FPGA和DDS的正弦信号发生器程序-Based on FPGA and DDS sinusoidal signal generator program
xinhaofashengqi
- 基于CPLD的可变频率正弦信号发生器设计，方便初学者学习FPGA和CPLD-CPLD-based variable frequency sinusoidal signal generator design, easy for beginners to learn FPGA and CPLD
dds_synthesizer_latest.tar
- 基于FPGA的DDS信号发生器，1-20Mhz。调试通过。-FPGA-based DDS signal generator ,1-20Mhz. Through debugging.
dds20
- 基于FPGA的信号发生器，可实现任意波形输出，任意频率输出。-FPGA-based signal generator, arbitrary waveform output, the arbitrary frequency output.
dds
- 基于FPGA的数字信号发生器，通过直接数字合成法，产生方波、正玄波、锯齿波、三角波-FPGA-based digital signal generator, the direct digital synthesis to produce a square wave, sine wave, sawtooth, triangle wave
test
- 基于ALTERA fpga的DDS信号发生器程序，实现波形自动赋值和在1602上显示的功能-DDS signal generator program based on ALTERA fpga.It can generate waveform and assign its frequency automatically and displayed on 1602 screen.
DDS
- 基于DDS算法的正余弦信号发生器的FPGA实现-Based on DDS Algorithm cosine signal generator FPGA