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51汇编程序1ASM
- 本程序用于测试实时时钟模块SD2000的SRAM存储器D/E系列， 程序功能如下： 1. 关闭/INT1及/INT2的中断输出 2. 初始化时间(写时间数据) 3. 在BREAKPOINT1设断点时,依次读时间-写SRAM数据-读SRAM数据循环 4. 全速执行时,LED四位分别显示小时和分钟的值-procedures used to test the real-time clock module SD2000 SRAM memory D / E Series, procedures follo
videocap
- 视频采集控制缓存SRAM读写，对做视频采集有很好的参考。
FIFO
- verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
sram
- 对常用的sram完成读写控制，可以根据具体地址增加参数，非常灵活-Commonly used to read and write sram to complete control, can be increased in accordance with the specific parameters of address, a very flexible
63535309sram
- verilog编写的读写SRAM的源码，包括sram的读写控制-SRAM read and write verilog source code written in, including the sram to read and write control
iic_communication
- 实现IIC通信,通过一段式有限状态机实现对SRAM的读写时序,清晰易懂.-this code is very easy to understand
Csramzipo
- 对常用的sram完成读写控制，可以根据具体地址增增加参数，非常灵活 ，经测试可直接使用。 -Control on the commonly used sram read and write, add a parameter can be increased according to the specific address, is very flexible and has been tested and can be used directly.
SsraamzipR
- sram 读写小程序源码，用verillog开发的，请各位高手指教 -sram read and write a small program source code, developed in verillog, please expert advice
FPGA-SRAM
- FPGA 实验、SRAM 读写实验，达尔EDA 实验室EP2C5 型或EP2C8 型FPGA/SOPC 实验板—dl2c58c_v3-Experimental FPGA, SRAM read and write experimental, Total the EDA lab EP2C5 type or the EP2C8 type FPGA/SOPC experimental board-dl2c58c_v3
zbt_sram_ctl_vhdl
- 实现高效ZBT SRAM 读写，全文采用VHDL语言-Efficient ZBT SRAM read and write。 text using VHDL
SRAM
- SRAM读写测试实例，每秒钟进行一次单字节的SRAM 读和写操作，用chipscope查看时序波形。(SRAM read and write test instances, each time a single byte SRAM Read and write operations, use chipscope to see the timing waveform.)
FPGA控制SRAM的读写
- FPGA控制SRAM的读写，通过测试！！！！！！！！！！！！！！！！(FPGA controls the reading and writing of SRAM)