搜索资源列表
Cyclone_II_FPGA_sch
- altera 飓风二代开发板的原理图，pdf格式 -altera hurricane of the second generation development board schematics, pdf format
xiangqixuanfeng6.2
- 正版的象棋旋风象棋软件，不要错过好机会，机会难得-Genuine Tornado chess chess software, do not miss a good opportunity, a rare opportunity
DE2_NET
- altera cyclone 2 net example
S_ram
- S_ram in vhdl languages in fpga chip for cyclone 2
audio_latest.tar
- Audio Codec(ADPCM 1-Bit) The code is ready for Altera Cyclone-II DE1 Starter board and it is tested, you can modify codes and use them in any project. Core Descr iption: Sampling Frequency: 44100Hz Channels: Stereo Bit-rate: 1 Bit Per Sa
实验三（1）的指导书
- 8-3优先编码， 1、学会用Verilog语言的描述方式来设计电路； 2、熟悉8—3优先编码器，并用Verilog语言实现其功能； 3、掌握Cyclone系列FPGA的程序加载，熟练掌握将.sof文件加载到实验箱中，实现8—3优先编码器的效果。(8-3 priority coding, 1. Learn to design the circuit with Verilog descr iption; 2. Familiar with 8-3 priority encoder and i
pong
- pomg ps/2 vhdl cyclone 1