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VHDLshixuluoji
- 简单的12位寄存器 带三态输出的8位D寄存器：74374 简单的锁存器-simple register with 12 three-state output of eight D Register : 74374 simple latch
Latch
- 用LABVIEW8.0寫的拴鎖程式
multi8x8
- 该源码为8位乘法器的VHDL语言描述，由一个8位右移寄存器，2个4位加法器例化成8位加法器，一个16位数据锁存器构成。采用移位相加的方式，从被乘数的低位开始，与乘数的每个位移位相加求和。最后实现其乘法器功能。-The source code for the 8-bit multiplier in VHDL language to describe, from an 8-bit right shift register, two 4-bit adder example into 8-bit add
4luqiangdaqi
- 4路抢答器，具有锁存与声音和LED显示功能。-Answer 4-way, and has a latch with the sound and LED display.
siluqiangdaqi
- 1、用feng模块将选手按下按键信号输出高电平给锁存模块lockb，进行锁存的同时发出aim信号实现声音提示，并使count模块进行答题时间的倒计时，在计满100妙后送出声音提示； 2、用ch41a模块将抢答结果转换为二进制数； 3、用sel模块产生数码管片选信号； 4、用ch42a模块将对应数码管片选信号，送出需要的显示信号； 5、用七段译码器dispa模块进行译码。 -1, using feng module will press a key player to a
course
- 简单微型计算机设计 设计一个8088系统，要求接成最大模式。地址锁存器选用74LS373，数据总线收发器用选用74LS245，时钟发生器选用8284，中断控制器选用8259A，总线控制器选用8288。 -Design a simple micro-computer. Design 1. 8088 to design a system, then into the most requested model. Address latch selection 74LS373, selectio
chengxu
- 带锁存功能的串入并出芯片。这里给出74hc595的c51驱动程序-With latch function and the string into a chip. Here are the 74hc595 driver c51
AD9851_VERILOG
- 一个DDS芯片AD9851的VERILOG程序，加74HC574锁存器！-A DDS chip AD9851' s VERILOG program, plus 74HC574 latch!
dianzhen
- 16*16点阵代码，芯片为stc89c52rc，74hc573锁存数据。-16* 16 dot matrix code, chip stc89c52rc, 74hc573 latch the data.
disp_led_series
- 适用于8位动态扫描的串行传输-锁存的低有效LED驱动电路，程序根据Disp_Buf[LED_Num]内信息逐位更新LED显示,基于ZLG easy1138学习板-For 8-bit dynamic scan of the serial transmission- Latch LED driver circuit of low-effective, procedures, according to Disp_Buf [LED_Num] update the information in bit-L
vhdl
- 实现代码，A、B为输入、Y为输出，它们为8位向量。OE为输出使能，低电平有效。IE为输入锁存时能，上升沿有效。Ci为进位输入，Co为进位输出。 S0、S1、S2为运算逻辑选择输入： ，用vhdl语言编写，基于数字电路。-Implementation code, A, B input, Y the output, they are 8-bit vector. OE to output enable, active low. IE when the input latch, rising e
D
- 用数码管编的时钟程序，采用了数码管的动态显示，没有锁存器-Part of the clock with a digital control program, using the digital control of dynamic display, no latch
gatedlatch
- latch in FPGA-latch in FPGA
Latch_n_Flip-flop
- Introduction for latch and flip-flop.-latch and flip-flop is describe in this word file.
suocunqi
- Ｄ锁存器ＶＨＤＬ语言描述。使能端有效时，Ｑ《＝Ｄ-D latch described in VHDL language. Enable effective end when, Q " = D
TI_460805
- ti公司的pcb库，包含ti公司绝大部分元器件的pcb封装-TI pcb labrary
SR_latch
- SR锁存器的verilog程序实现-SR latch verilog program
latch
- Latch using VHDL simulated with ISIM
Latch study_1
- Latch study using ADAMS