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dds36
- 基于FPGA的DDS调幅与调频,调幅在0到5V步进为0.1V,频率从10HZ到1M,分为两段,一段为10HZ到1KHZ,步进为10HZ,1KHZ到1MHZ,步进为1KHZ-DDS-based FPGA' s AM and FM, AM Stepping in the 0 to 5V for 0.1V, the frequency from 10HZ to 1M, is divided into two paragraphs, one for the 10HZ to 1KHZ, steppi
Detectionreceiver
- 本设计采用AT89S52为控制核心,以DDS芯片AD9850产生频率可以自动可调的正弦扫频信号,实现了全频范围和特定范围内自动搜索和手动搜索,并且鉴别外来信号的调制方式:调频、调幅、等幅。通过单片机自动显示外来信号频率并存储,达到侦察接收机的性能要求。-AT89S52 the design for the control of the core, have a DDS chip AD9850 automatically adjustable frequency swept sine signal