This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters.

完成通信系统中数据交织器的设计的设计，要求用Verilog HDL编程，在DE2平台上实现，在示波器上显示观察。-Complete data communication system Interleaver Design for the design, requirements using Verilog HDL programming, implemented on the DE2 platform, observed on the oscilloscope display.