搜索资源列表
cic-miso
- 关于CIC滤波的一个程序
Alamouti
- with MISO, use by Alamouti
MISO_Capacity
- 多输入单输出的系统的系统容量的仿真程序。对学习MIMO技术很有帮助。-MISO
fantasy
- miso hammerstein models
xindaorongliangbijiao
- 比较siso、simo、miso、mimo信道的容量大小-Compare siso simo, miso, mimo channel size
program
- 分别上传了多天线系统中的SISO，SIMO，MISO以及MIMO模型仿真程序，对比了不同模型的容量。还有最优算法与最大范数算法的误码率比较程序。很实用！-Upload four system model,SISO SIMO MISO and MIMO,respectively.And compare their capacity.In addition,a BER program is also uploaded based on optimal algorithm and maximum no
SIMOrayleighCDF
- MISO瑞利信道的信道容量累计分布曲线比较CDF-MISO Rayleigh channel channel capacity cumulative distribution curves CDF
MIMO
- 用Matlab写的MIMO信道容量的程序，实现了SIMO、MISO、MIMO的信道容量的概率分布曲线 -Using Matlab write MIMO channel capacity of procedures, SIMO, MISO, MIMO channel capacity of the probability distribution curve
PESGM2008-000268
- Preparing for New MISO Ancillary-Service Market: FirstEnergy Perspectives
ofdm123
- mimo capacity . to maximize the capacity of the channel using siso, simo,miso,mimo technique
MIMOcapacity
- MIMO信道容量仿真程序,包括SIMO.MISO.MIMO.SISO几种信道容量的仿真程序-MIMO channel capacity simulation program, including several channel capacity SIMO.MISO.MIMO.SISO simulation program
MISO
- 2 x 1 MISO Implementation with Channel Conditions
module_pytwink_pys60
- This `pytwink`, a Python for S60 extension that is somewhat like the Miso extension in being a somewhat random collection of utility functions and classes, except that `pytwink` is only for S60 3rd Edition and higher, and is even more liberal i
capacity-of-mimo
- mimo and miso capacity simulation
SPI-slave-system
- FPGA时序逻辑设计：串行外围设备接口SPI从设备系统，包括串行时钟线SCK，主机输入/从机输出MISO，主机输出/从机输入MOSI和低电平有效的从机选择线SS。环境为Quartus。-FPGA Timing Logic Design: Serial Peripheral Interface SPI Slave Device System Includes Serial Clock Line SCK, Host Input/Slave Output MISO, Host Output/Slave
EXACT-CODE
- COMPARISON OF MIMO MISO SIMO SISO WITH AND WITH OUT WATER FILLING ALOGORITHM
原理图和PCB源文件
- 该ISP编程器采用ATMEGA8_DIP28作为主控制芯片，预留MOSI，MISO，RET，SCK，VCC，GND。6PIN接口，方便使用者根据需要连接目标板。 同时预留PROGRAMMING编程接口，用户可自行升级下载器固件。(The ISP programmer uses ATMEGA8_DIP28 as the master control chip, reserved for MOSI, MISO, RET, SCK, VCC, GND. 6PIN interface to fac
lpcopen_2_10_keil_iar_ea_devkit_1788
- The CS signal selects one slave, and the slave takes over the MISO pin. If a slave is not selected, then it shall leave the MISO pin in hi-z state. If multiple slaves have their CS signal asserted, they will try to take control of the MISO pin and da
MISO_SPI
- This file contains API to enable firmware control of a Pins component.