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本文主要分析了FIR数字滤波器的基本结构和硬件构成特点,简要介绍了FIR滤波器实现的方式优缺点 结合Altera公司的Stratix系列产品的特点,以一个基于MAC的8阶FIR数字滤波器的设计为例,给出了使用Verilog硬件描述语言进行数字逻辑设计的过程和方法,并且在QuartusⅡ的集成开发环境下编写HDL代码,进行综合 利用QuartusⅡ内部的仿真器对设计做脉冲响应仿真和验证。-This paper analyzes the FIR digital filter structure an
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设计与验证verilog hdl配套光盘-Design and verification verilog hdl" supporting CD-ROM
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OVM(Open Verification Methdology) for system verilog or systemC
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该代码是Veriloghdl语言实现的串口通信，经过FPGA板子下载验证通过，读者可以使用-The code is Veriloghdl language of the serial communications, after verification by FPGA board download, readers can use
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this pdf file will gives the details of synopsys tool design space and verilog HDL ASIC design based tips.also this pdf is a power point presentation with functional verification tool of synopsys VCS tool.... VERY USEFULL FOR PROFESSORS
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交通灯控制器的Verilog代码，采用了三段式的状态机描述，适合学习和练习，包括了验证代码-A Verilog code of Traffic light controller, using a three-stage state machine descr iption suitable for learning and practice, including the verification code
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解析verilog代码的perl脚本，解析结果可用于一系列验证自动化-Verilog code parsing perl scr ipt that the analytical results can be used to automate a series of verification
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ST公司的M25Pxx SPI flash memory的verilog仿真模型，该模型准确地描述了SPI flash memory的行为，包括读，写，擦除等操作，可以用来挂在带有SPI接口的soc外部，方便验证SPI接口。 -ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including readi
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OVM即开放验证方法（机制篇）
基于system verilog语言-OVM (Open Verification Mechanism) source code. System verilog language
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Verilog HDL source code of generating a ROM file (in Quartuss) and testbench in Modelsim (verification)
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关于LDPC解码的verilog程序，包含设计代码和验证环境-LDPC decoding on verilog procedures, including the design code and verification environment
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axi uvm vip, verification model -axi system verilog
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Classic System Verilog PPT by XiaYuwen
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基于quartus II的CRC16校验代码，并实现了Modlsim实现了仿真验证(The CRC16 check code based on Quartus II and the realization of the simulation verification by Modlsim)
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verification of mux using system verilog
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AXI4 verification and design using verilog.
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