搜索资源列表
H6502
- H.264标准解码器全部verilog源码,包括帧内、帧间、变换编码、熵编码、滤波等所有模块和著名的6502的软件源码-The standard H.264 decoder all verilog source code, including the frame, frame, transform coding, entropy coding, filtering all modules and the famous 6502' s software source code
Vfirr_using__e
- 一种基于verilog的fiir滤波,并带matlab仿真 -Based verilog fiir filter with matlab simulation
Tuart_tx_rxh
- 该工程用verilog编写,已通过串口调试助手调试通过,接收模块采采用8倍波特率采样数据,有较好的滤波功能,在PC上完成自发自收功能。 -The project is written in verilog debugging through serial debugging assistant, adopted 8 times the baud rate sampling data receiver module, better filtering done on the PC sponta
Pro_19
- Fpga,DDS,PLL,rom(正弦波)(f<13MHz,需要滤波)(Verilog)-Fpga, DDS, PLL, rom
delay_module
- 本代码利用Verilog实现了键位按下时的抖动毛刺的滤波处理,主要包含电平检查模块和一个延迟模块。-This code implements the use of Verilog jitter filtering glitches keys pressed, the main level include checking module and a delay module.
27796715MedianFilter33
- 一种中值滤波的VERILOG代码,希望对需要的人有帮助 ,-media filter
DS_GMSK_MD
- 文件由两部分组成,直扩GMSK调制的matlab仿真程序和Verilog硬件程序。完成了对信号的扩频编码,GMSK调制,硬件程序中的高斯滤波器调用自matlab仿真产生。包括ds_gold_gmsk.m,mseq31.m,zhikuoGMSK.m以及d_encode.v,code_convert.v,frame.v,DS.v,gauss_filter.v,DS_GMSK_MD.v等编码,组帧,滤波,扩频,调制众多源码-Document consists of two parts, DSSS MS
AD_filter
- 一个最简单的verilog实现的ad采样数据滤波的算法。可以用来学习ad数据的滤波.-One of the simplest ad sampled data filtering algorithm verilog achieve. Learning can be used to filter data ad
median_filter
- 这个verilog程序实现了图像中值滤波,处理实时性很强,有兴趣的可以参考(This Verilog program implements the median filter in the image, the processing is very real, and the interest can be referred to)
lowpass
- 低通滤波,参数含通带截止频率,阻带截止频率,边带区衰减DB数设置,截止区衰减DB数设置和序列x的采样频率。(Low pass filter, parameters including passband cut-off frequency, stop band cut-off frequency, sideband attenuation DB number, cut-off area attenuation DB number setting and sequence x sampling fr