搜索资源列表
Ch3_fpga_design
- xilinx virtex fpga
Ch5_Constraint
- xilinx virtex constraint
virtex4_datasheet
- virtex-4 datasheet
dsp-book
- High-Performance DSP Using Virtex-4 FPGAs,very detail-High-Performance DSP Using Virtex-4 FPGAs, very detail
XFPGA_DDR_SDRi
- 基于Xilinx FPGA的DDRSDRAM的Verilogg控制代码，使用的FPGA为Virtex. -Based on Xilinx FPGA' s DDRSDRAM Verilogg control code, the use of FPGA as the Virtex.
xapp852.zip
- Xilinx Virtex5 for RLDRAM design,Xapp852 (Xilinx Design RLDRAM II Memory Interface for Virtex-5 FPGAs)
Asynchronous_FIFO
- 异步FIFO代码，虽然是一个比较简单的程序，但有助于我们更好的理解异步FIFO-This implementation is based on the article Asynchronous FIFO in Virtex-II FPGAs writen by Peter Alfke. This TechXclusive Xilinx website. It has some minor modifications.
mem_interface_top_ddr_controller_0
- 在 Virtex™ -4 XC4VLX25 FF668 -10C 器件中实现的 DDR SDRAM 控制器。-DDR controller
proceduharbrocedural
- xilinx virtex constraint 通过Winsock控件建立的客户,服务器文件传输程序-Xilinx virtex constraint by Winsock control to establish client, server file transfer program
ptmi
- xilinx virtex constraint 通过Winsock控件建立的客户,服务器文件传输程序-Xilinx virtex constraint by Winsock control to establish client, server file transfer program
nttwork
- xilinx virtex fpga 这是一个用来检测局域网是否正常的程序的源代码-Xilinx virtex fpga whether this is a used to detect local area network (LAN) normal program source code
ukwvf
- xilinx virtex fpga 这是一个用来检测局域网是否正常的程序的源代码(Xilinx virtex fpga whether this is a used to detect local area network (LAN) normal program source code)