搜索资源列表
crc_verilog
- HDLC控制协议中CRC校验码算法代码，为CRC16，Verilog语言
16pam
- 用VERILOG语言实现16QAM的数字调制的程序，已经在ISE10.1版本中调试通过
B3ZS
- 此文件为B3ZS编解码，本人在我公司的通信设备上已经通过了试验，编写语言为verilog，解压无密码。-B3ZS coding and decoding, I in my company's communications equipment has passed the test, prepare for the Verilog language, without extracting passwords.
用verilog硬件描述语言编写的fft算法
- 用verilog硬件描述语言编写的fft算法，很是经典，和大家共享，希望能对大家有所帮助。,Verilog hardware descr iption language with the preparation of the fft algorithm, it is a classic, and we share the hope that it can be helpful to everyone.
filter
- 基于verilog硬件描述语言的滤波器设计，便于开发者从理论到实现-Verilog hardware descr iption language based on the filter design, ease of developers from theory to implementation
ser2par
- 16位串行输入,并行输出，运用verilog语言编写，已通过测试-16-bit serial input, parallel output, using verilog language, has been tested
serialcomuniactionsource_files
- 用于FPGA与232通信的编程设计，用VERILOG语言编写的，在ISE中仿真-232 communications for FPGA programming and design, using the VERILOG language in ISE Simulation
dev_xts_gold
- xts-mode解密程序。verilog语言-xts-mode decryption
verilog_scramble.v.tar
- 扰码程序，利用Verilog语言实现，适合各种通信系统的扰码。-scramble code,verilog hdl,adapt to many communication systems
C6474L_EVM_RTL
- TI C6474评估板的fpga源代码，初始化板子必备代码，Verilog HDL硬件语言编写。-TI C6474 evaluation board fpga source code, the code necessary to initialize the board, Verilog HDL hardware language.
iic_master
- 通过verilog 语言实现iic master功能，并由LED输出打印-iic master