搜索资源列表
CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
WaveLine
- 一个能显示波形图的软件，还能以七段数码管显示数字。-A waveform diagram showing the software, but also to Seven-Segment LED display figure.
disp
- 七段数码管显示程序 可以使七段数码管正常显示-Seven-Segment LED display program Seven-Segment LED can display
led
- 可以显示六个BCD码的动态扫描七段数码管显示电路。有缓存，闪烁等模块组成。-BCD code to show the dynamics of the six and seventh scan digital tube display circuit. There cache, blinking and other modules.
Digitaltube
- 数码管显示输出，七段数码管，并行数据输出，键盘输入信号-Digital display output, Seven-Segment LED, parallel data output, keyboard input signal
verilog2
- 本代码在Quartus II 9.0 (32-Bit)环境编译运行，使用SOPC_NIOSIIFPGA开发板，可作为入门级代码讲解，将50MHZ的频率改为1MHZ，并以此频率为基准计数显示在七段数码管上。（采用verilog语言）-The code in Quartus II 9.0 (32-Bit) environment to run the compiler, the use of SOPC_NIOSIIFPGA development board, entry-level code ca
SMGJX
- proteus 六位七段数码管数码管静态显示从零至F-proteus 6 Seven-Segment Digital control Digital control static display- from zero to F
led
- 七段LED数码显示器是数字系统中常用的数码显示元件，二进制数不能直接在LED数码管上显示，需要用一个BCD七段译码器进行译码。下图给出了一个七段显示译码器的框图及相应的七段LED数码管的示意图。-Seven-segment LED digital display is commonly used in digital systems digital display devices, a binary number can not be directly displayed on the LED
Timer
- 用verilog语言实现的定时器。在DE2-70开发板上设计，七段数码管分别用于显示时/分/秒，并带有预置时间功能。-Timer verilog language. DE2-70 development board design, seven-segment digital tubes were used to display hours/minutes/seconds, with the function of the preset time.
VC_Programme
- 七段数码管显示控件源码，并应用到VC++实现温湿传送表通信检测程序中（全部源代码）-The seven-segment LED display control source, and applied to the VC++ to achieve the temperature and humidity transfer table communication detection program (source code)...
4
- 设计一个能显示时、分、秒的实时时钟，通过实验板上的七段数码管显示。-Design a display hours, minutes, seconds, real time clock, seven-segment digital tube experiments by panel display.
KEY
- 能够通过2 位七段数码管显示按键编号，显示范围0‐15 按键采用4*4 方式的矩阵键盘，编号K0 – K15 能够分别统计按键被按下的次数，并通过1 位七段数码管显示，显示范围0‐-1, 7 segment digital tube can cycle show 0-9 2, 0-9, at the same time, key K0- K3 can control LED0- destroy LED3 light can pass two number seven segment
one_wire
- 此程序是利用FPGA和DS18B20测试温度，并通过七段数码管显示出来，程序已通过FPGA验证，但只能挂载一只DS18B20，而且没有报警功能，全面的DS18B20测温程序我会尽快更新，谢谢。-This program is the use of FPGA and DS18B20 test temperature, and through the seven-segment LED display, the program has been validated through the FPGA,
T_lock
- 使用七段数码管显示的四位十进制密码锁，可以重置密码-Use the seven-segment LED display of four decimal locks, you can reset the password
seg7(EP1C6Q240C8)
- 七段数码管显示，黑金开发板EP4CE15F17C8。-Seven-segment LED display
The-display-of-Subtraction
- 利用VHDL语言编写减法器，并利用七段数码管显示。-Using VHDL language to editing subtraction, and the use of seven digital tube display.
divider8
- 使用硬件描述语言设计8分频器，并将结果通过七段数码管显示-The hardware descr iption language is used to design the 8-frequency divider, and the result is displayed by 7-segment LED
mfc+vc+七段数码管+时间显示
- mfc+vc+七段数码管+时间显示,用位图刷新显示时间，验证通过的(MFC vc + + 7 digital tube + time display)
分频显示
- VHDL实验中，实现分频与数码管显示。掌握BCD-七段显示译码器的功能和设计方法； 掌握用硬件描述语言的方法设计组合逻辑电路——BCD-七段显示译码器。(In the VHDL experiment, frequency division and digital tube display are realized.)
七段数码管显示
- 使用可编程并行I/O接口芯片8255、地址译码器、七段数码管等硬件，搭建七段数码管显示装置，实现键盘输入两个数字的ASCII码、数码管可动态显示这两个数字的功能。(Using programmable parallel I/O interface chip 8255, address decoder, seven segment digital tube and other hardware, build seven segment digital tube display device, re