该程序是用Verilog语言写的，可以完成（1，5，9）格式的浮点数相加。-The program is written in Verilog, you can complete the (1,5,9) add floating-point format.

将BLIF（Berkeley Logic Interchange Format）格式的电路转换为verilog代码，使用perl编写，需要perl环境才能使用。 内含BLIF格式的官方说明。-Translate BLIF（Berkeley Logic Interchange Format）circuit to verilog descr iption, the translator need perl environment to run. Please check you have rel

FPGA中将RAW原始图像数据转换为RGB格式图像的Verilog源代码，共两个文件，亲测可用-The FPGA will be RAW data is converted to RGB format images of original image Verilog code, a total of two files, close test available

Verilog代码，功能为用fpga进行图片格式转换(fpga picture format conversion)