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miaobiao 用verilog VHDL描写的秒表程序
- 用verilog VHDL描写的秒表程序，可以显示百分秒，秒和分。-Verilog VHDL with the descr iption of a stopwatch program, can display the arc, seconds and points.
TLC2543.rar
- 模数转换TLC2543十二位串行芯片驱动程序，经用已得证实．用都只需根据需要修改即可．,Analog-digital conversion chip TLC2543 12 serial driver, was confirmed by the use has. Using both can be modified only as needed.
FPGAFFT.rar
- FPGA控制串行AD（AD0804）,状态机实现，可以根据该程序实现数字电压计，数字温度计的设计,FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
VHDL.rar
- 4*4键盘扫描的VHDL程序，可消除抖动，可以帮助大家一下,4* 4 keyboard scan VHDL procedures to eliminate jitter, we can help you
CORE8051_ADC_OK_328
- 这是一个在Fusion系列的AFS600的FPGA，在里面嵌入51核和12位adc模块，可以在lcd12864上显示，能正常转换电压。做adc使用。-This is a AFS600 at the Fusion series FPGA, embedded in which 51 nuclear and 12-bit adc module, you can show up at lcd12864 to the normal voltage conversion. Does the use of a
VHDL
- 1、 设计一个简易电子琴。要求能演奏的音域为中音的 1 到高音的 1。 2、 用GW48－PK2中的8个按键作为琴键。 3、 GW48－PK2中有扬声器。 4、 可以使用GW48－PK2上的12MHz作为输入时钟信号。 -1, the design of a simple flower. Requirements can play for the tenor of the range of 1 to treble the 1.2, and GW48-PK2 in eight ke
CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
VHDL
- 计算器，可实现加减乘除运算并包含数码显示与输入部分。-Calculators, multiplication and division addition and subtraction operations can be realized and includes digital display and input section.
ledwater
- 使用VHDL语言编写的跑马灯程序，利用Quartus2可以对其编译下载-The use of VHDL language Marquee procedures, the use of their compiler can download Quartus2
Elevator
- 实现扫频率的功能，调试成功，能够很准确的扫描频率，欢迎大家使用-To achieve the function of the frequency sweep, debugging success, can be very accurate scanning frequency, welcome to use
watch
- 功能更强大的数字时钟,有年份,月,日,时,分,秒和星期,可以调校-More powerful digital clock, there are years, months, days, hours, minutes, seconds and weeks, you can adjust the
ARM_and_Verilog
- arm处理器的vhdl源代码编写，可以参考-arm processor VHDL source code to prepare, can refer to
Lift_Controller
- 这个文件包含了我前一段写的关于3~8电梯控制的4-5个程序!并且附有比较详细的注释.准确说这是一份课程设计报告.在最终版本的程序中对于FLEX10K系列器件只占用141个逻辑单元,频率可达60多Mhz,选择CycloneII器件可达260多Mhz.因为包含了好几个程序,希望站长不要只安一个程序处理,能及时开通!-This document contains a section of my previous writing on the 3 to 8 elevator control proced
xmsmmc_core
- MMC卡的仿真模型，欢迎大家下载，浏览，用在我的开发中·-MMC card simulation model,can be used in the test case.
FPGA-TWO-RAM
- 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
ADCDAC
- ADC,DAC转换接口~耐心讲述可以学会使用原理-ADC, DAC converter interface ~ patience can be learned about the use of the principle of
restoring
- restoring除法器设计 经典算法了，可以仿真通过-divider restoring a classical algorithm design, simulation can be adopted
fir_16
- vhdl代码 实现16阶fir滤波器，可以仿真通过-vhdl code fir filter stage 16 can be adopted simulation
Sine
- 正弦波发生器，可以让大家学习正弦多种产生方法，可以设计具体电路-Sine wave generator, allowing them to learn the method for multiple sinusoidal, can design a specific circuit
VHDL-Vending-machine
- 用VHDL设计自动售货机，能实现自动找零的功能。-Vending machines with VHDL design, auto-change function can be realized.