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fifo
- To write data to the FIFO, present the data to be written and assert the write enable. At the next rising edge of the clock, the data will be written. For every rising edge of the clock that the write enable is asserted, a piece of data is written in
aFifo
- 異步FIFO試作,寫入與讀取資料的時脈不同,藉此程式來達成-Test for asynchronous FIFO, write and read information on a different clock to the program to achieve
maxii_sch
- 采用EPM570作为核心,外接FIFO,RAM。可进行数据采集,采用60M时钟的ADC ADS830E。ADC前端电路需要改为差分输入方式以减小电路噪声。该电路经过实际检验可以使用,需要将JTAG电阻改为220以下或者短接。-EPM570 used as a core, external FIFO, RAM. Can be a data collection, using 60M clock ADC ADS830E. ADC front-end circuit differential inpu
FIFO
- FIFOFile name:FIFO //Describe:32*32bit FIFO //Input:data[31:0],wrreq,rdreq,clock //Output:q[31:0],full,empty //Date:2009-12-10 -FIFO
s_fifo
- FIFO是一种先进先出的输入缓冲器,同步FIFO是指写入和读取数据需要时钟的作用-The FIFO is a FIFO input buffer, the synchronous FIFO refers to the role of the write and read data requires clock
fifoVerilog
- 设计一个异步FIFO,完成数据平滑功能,FIFO的深度为256,宽度为8位,实时给出读空和溢出指示,写时钟为带间隔的100MHz,读时钟为5MHz,代码为了便于读阅,存放在word文档,可直接拷贝到quartus或者ise编译平台下使用-Design an asynchronous FIFO, complete data smoothing function, the depth of the FIFO 256, and the width is 8 bits, real read empty
PageReplacement
- 用c语言实现的页面置换算法,具体包括最佳替换算法,随机替换算法,FIFO算法,LRU算法和Clock算法。引用串的生成是尽量模拟真实的程序局部性而设计的。-a C program implements page replacement algorithm:include optimal algorithm, random algorithm, FIFO algorithm, LRU algorithm and Clock algorithm. The generation of referenc
Synchronous_FIFO
- 同步FIFO代码,这是一个简单的同步FIFO,虽然其简单了点,但是通过其练习,可以较好的理解-Synchronous (single clock) FIFO
Program
- 实现OPT、FIFO、LRU、Clock等页面替换算法。接收用户输入参数,包括程序长度(页面数)、页框个数及页面大小,输出结果采用不同颜色区分命中、替换及直接加入空闲块。-Implementation of OPT, FIFO, LRU, Clock and other page replacement algorithm. Receive user input parameters, including the length of the program (page number), page
fifo
- 学习Clifford_E论文之后完成的异步FIFO,可以完成异步时钟下的数据同步(After learning Clifford_E paper, the asynchronous FIFO can be completed under asynchronous clock data synchronization)
