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spi_master
- SPI wishbone master and verification environment
fsm
- 高效的有限状态机，代码形式给给出 主要是我的一些学习资料-Efficient finite state machine, code form is mainly to give some of my learning materials
fsm
- finite state machine writing in VHDL using proteus software.
lab03-.tar
- vhdl about 3 stage control block of cpu-vhdl control block of the 3 stage cpu(FSM)
LAB
- SAM VHDL编码，包括数据选择器，加法器，简易逻辑电路，有限状态机等(FSM SAM ALU and many other different parts)