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Jh_cpu
- Jh_cpu is a cpu with 12 address,8 data bus, adn give direct address ,indirect address two addressin way.-This VHDl code can provide a total clear and detail process to create a basic function risc cpu.
WatchForLab
- This was the first lab assigmnet in the course CPU Architecture, creat a basic watch
CPU
- 计算机组织与结构课程设计,使用VHDL设计一个简单功能的CPU。该CPU拥有基本的指令集,并且能够使用指令集运行简单的程序。另外,CPU的控制器部分(CU)采用微程序设计方式。-The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to g