DES Encoder and Decoder Verilog RTL Code

 “\Example-s5-1\des” 目录下为设计工程，其设计输入采用Synplify预先编译好的.vqm网表  “\Example-s5-1\source”目录下为设计的源代码，这里只给出了Verilog语言实例，仅供读者参考  “\Example-s5-1\source \area_opt”目录下为面积优化的代码  “\Example-s5-1\source \perf_opt”目录下为性能优化的代码 “\Examp

利用verilog实现的DES和3DES两种加密算法，其中每个算法又利用了两种实现方式，分别是面积优先和性能优先-Both use DES and 3DES encryption algorithms verilog implementation, which took advantage of each algorithm implemented in two ways, which are the priority and performance priority area