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zhu
- 基于FPGA的SPI接口设计，主模式，频率可调，verilog HDL编写-FPGA-based SPI interface design, master mode, adjustable frequency, verilog HDL prepared
SPI_Core_2
- 用Verilog HDL 语言编写的，可在FPGA上实现的SPI总线主端 收发读写模块 -SPI Master Read-Write controller core which was Writted by Verilog HDL based on fpga
Receiver
- FPGA SPI串行收发数据全双工程序开发，使用Verilog HDL开发语言-FPGA SPI serial port to send and receive data all double engineering sequence development, using Verilog HDL language development
ad9787
- FPGA上与AD9787进行spi通信的verilog HDL,VHD....等例程(SPI AD9787 communication routines)
adc_interface-master
- ADC_Interface Simple SPI interface for AD7908/AD7918/AD7928 written in verilog HDL