搜索资源列表
lfsr
- 用LSFR实现计数功能，可以减少对寄存器和少一个加法器，涉及verilog的人来说-Used to achieve LSFR counting functions, can be reduced to a few registers and adders, the people involved in Verilog
daima
- Verilog下寄存器的开发代码，下载到Spartan3的引脚代码以及波形仿真文件-Under the development of Verilog register code, download Spartan3 a pin code and waveform simulation file
lfsr_beh
- 线性反馈移位寄存器设计源码，用verilog语言描述-linear feedback shift register
LineBuffer
- Verilog HDL的移位寄存器的modelsim仿真
cfg9517_v3
- AD9517的配置程序，寄存器参数根据需要自己改，双差分输出，verilog-AD9517 configuration program, register yourself to change the parameters as needed, dual differential output, verilog
A
- 此为用verilog hdl编写的FPGAproject 其中A5+工程为带vga显示 分辨率600*800@60HZ 带字母显示（直接将ASCII码输入到寄存器中 窗口大小可调整）；A1工程为软核处理器 可配合使用 实测功能强大-This is written in Verilog HDL FPGAproject the A5+ engineering with VGA display resolution 600*800@60HZ with letters display directly
扰码
- OFDM技术中经常用到扰码技术，本设计采用线性反馈移位寄存器实现简单扰码(relization of interference)
i2c_slave_model
- I2C从控制器verilog代码，主要用于混合信号ASIC的寄存器配置接口(I2C slave module in verilog)
mcode
- 附有m码产生verilog文件和测试文件，以及详细说明。读者可根据说明配置任意级m序列发生器(With M code, Verilog files and test files are produced and detailed. The reader can configure an arbitrary m sequence generator according to the instructions)
MyALU1
- 一个关于寄存器的ALU功能，并能进行寄存器间的相互转化。(ALU REGISTER. THEY CAN TRANSLATE TO EACH OTHER.)