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H6502
- H.264标准解码器全部verilog源码，包括帧内、帧间、变换编码、熵编码、滤波等所有模块和著名的6502的软件源码-The standard H.264 decoder all verilog source code, including the frame, frame, transform coding, entropy coding, filtering all modules and the famous 6502' s software source code
Pro_19
- Fpga,DDS,PLL,rom(正弦波)(f<13MHz,需要滤波)(Verilog)-Fpga, DDS, PLL, rom
delay_module
- 本代码利用Verilog实现了键位按下时的抖动毛刺的滤波处理，主要包含电平检查模块和一个延迟模块。-This code implements the use of Verilog jitter filtering glitches keys pressed, the main level include checking module and a delay module.
27796715MedianFilter33
- 一种中值滤波的VERILOG代码，希望对需要的人有帮助 ，-media filter
DS_GMSK_MD
- 文件由两部分组成，直扩GMSK调制的matlab仿真程序和Verilog硬件程序。完成了对信号的扩频编码，GMSK调制，硬件程序中的高斯滤波器调用自matlab仿真产生。包括ds_gold_gmsk.m,mseq31.m,zhikuoGMSK.m以及d_encode.v,code_convert.v,frame.v,DS.v,gauss_filter.v,DS_GMSK_MD.v等编码，组帧，滤波，扩频，调制众多源码-Document consists of two parts, DSSS MS
AD_filter
- 一个最简单的verilog实现的ad采样数据滤波的算法。可以用来学习ad数据的滤波.-One of the simplest ad sampled data filtering algorithm verilog achieve. Learning can be used to filter data ad
median_filter
- 这个verilog程序实现了图像中值滤波，处理实时性很强，有兴趣的可以参考(This Verilog program implements the median filter in the image, the processing is very real, and the interest can be referred to)