This structure matches the layout of the data saved to the stack following a device-not-present interrupt, part of it saved automatically by the 80386 80486.

Building a kernel capable running on 80386 and 80486. It may be necessary to simulate the cmpxchg8b on the 80386 and 80486 CPU.

WARNING: These codes are not documented by Intel in their 80486 manual and may not work on FPU clones or later Intel FPUs.