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mini_aes
- aes算法的verilog hdl实现，供给大家作为参考 。-Orangk'aes algorithm verilog hdl realized, we supply as a reference.
mini_aes_latest[1].tar
- AES 加解密 代码, 有文档说明，testbench-AES encoding decoding source code in HDL
tiny_aes_latest.tar
- 主要实现使用verilog HDL语言实现AES的加密算法-Main implementation using verilog HDL language implementation of AES encryption algorithm
AES
- AES加解密Verilog HDL源代码，具体的算法参照相关书籍，里面含有testbench-AES encryption and decryption Verilog HDL source code, reference books specific algorithm, which contains testbench
FPGA-IMPLEMENTATION-OF-AN-AES-PROCESSOR
- Advanced Encryption Standard(AES) implementing in a faster and secured way is expected. AES can be implemented in software/hardware. In hardware implementation ASIC solution requires high cost and much design time while FPGA based implementation