搜索资源列表
aes_core
- AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档，和此代码的测试程序，可作为一个IP核直接使用，可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use,
systemcaes_latest.tar
- 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
aes_crypto_core_latest.tar
- verilog code for aes
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
AES-based-on-FPGA-jiami
- 该模块是基于FPGA的AES加密算法实现的Verilog代码，包含一个顶层文件和两个调用模块，最高误差在15ns-This module is the AES encryption algorithm FPGA based on the Verilog code, contains a top-level files and two call module, the maximum error in 15ns
aes_core_latest.tar
- It is really recent AES encryption Decryption verilog code. It is working well! Just doenload and use!!
AES
- AES加解密Verilog HDL源代码，具体的算法参照相关书籍，里面含有testbench-AES encryption and decryption Verilog HDL source code, reference books specific algorithm, which contains testbench
aes__code_based_on_verilog
- AES核心代码，用verilog写的，可供参考-aes core code using verilog for learning
aes
- 使用verilog的128位aes加密源程序-Use verilog of 128 aes encryption source code
aes_thesis_v1.0
- aes code in verilog vhdl language which is very useful.
aes-master
- Verilog写的AES加密解密代码，带testbench。(AES encryption code written by Verilog with testbench.)