伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.

Very large (tested for more than 2048 bits) prime number generator and tester program. This is well written and based on solid algorithms in this field. Source code is my own, used for Masters course in Cryptography. Program has easily readable and

Java 16位MD5 Hash code generator-Java 16 md5 generator