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uartok
- 采用verilog编写的串口通信程序，采用了状态机设计！程序简单，消耗资源少-Serial communication written by verilog hdl. It is designed with FSM. The program is simple,and consume resource is few.
uart_verilog_v1
- uart d的verilog 程序，可以实现普通串口功能-UART d Verilog procedures can be achieved ordinary serial port function
uart
- Verilog实现串口收发数据，包括整个quartus工程-Verilog serial port to send and receive data, including the whole quartus project
UART
- 本人自己编写的FPGA异步串口通信模块（UART），基于QuartusII环境，verilog语言编写，包含仿真和全部程序及说明，验证通过，具有很好的稳定性和参考价值！-I have written of the FPGA asynchronous serial communication module (UART), based on QuartusII the environment, verilog language, including simulation and all the pr
serial_adda
- 硬件语言描述串行DA和AD转换，FPGA控制。能够很好的实现高精度的模数数模转换-verilog descr iption of the serial DA and AD conversion, FPGA control.
RS232(verilog)
- 串口RS232通信程序，包括对串口通信原理的说明。-RS232 serial communication program, including a descr iption of the principles of serial communication.
FPGA-RS232-verilog
- fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug deb
RS232
- 很好用的串口通讯程序，已经通过验证，用Verilog语言编写的放心使用了！-Good use of serial communication program has been validated using Verilog language used in the rest assured!
cw3
- serial port rs232 in verilog source code
SerialPort
- 一个用verilog HDL 编写的串口发送程序，可以下载到FPGA中。已经在ActelFPGA中试过了，很好用。稍微修改之后，可以与Xilinx和Altera公司的FPGA兼容。-A programe dialogue to transmit a serial data which is writen by Verilog HDL.
high_speed_data_recovery
- 1. 程序的功能是:高速串行数据的恢复. 2. 其基本原理是：利用过采样，检测串行数据的边沿跳变，然后根据边沿提取处在数据相位正中央相邻的抽样值，将串行数据恢复过来。 3. 此程序是verilog 语言编写，用于xilinx virtexE 系列的FPGA-1. Program functions are: high-speed serial data recovery. 2. The basic principle is: the use of over-sampling to det
Serial
- 串口通讯程序，用的芯片是 CP2102， Verilog HDL 程序，编译通过，完全可用-Serial communications program, using chip CP2102, Verilog HDL program, compiled by completely available
i2cBUS
- I2C总线是一种非常常用的串行总线，它操作简便，占用接口少。本程序(verilog hdl)介绍操作一个I2C总线接口的EEPROM AT24C02 的方法，使用户了解I2C总线协议和读写方法。-The I2C bus is a very common serial bus, it is simple, occupy less interface. This program (verilog HDL) introduced operating a AT24C02 EEPROM of I2C
uart
- 采用verilog语言描述的uart串口驱动程序主要用于调试-Using verilog language to describe the uart serial port driver is mainly used for debugging
FPGA_serial(verilog)
- 采用verilog语言编写的关于串口通信的程序，可以参考，希望有所帮助。-Verilog language on the serial communication program can help.
Uart-Verilog
- verilog实现串口通讯，包括verilog代码和testbench代码-verilog serial communication, including the verilog code and testbench Code
BtoC
- 文件中有两种方法实现并串转换模块代码的编写，可以在modelsim软件中正确仿真(There are two methods in the file to achieve the serial conversion module code writing, can be correctly simulated in Modelsim software)
uart
- 一个具有固定波特率的 UART 串口收发器，可以实现 串口收发器，可以实现 9600 波特率的串口通信， 能够与 PC 机串口进行通信，支持 8 比特数据位、 1 比特停止位、无校验硬件流控模式(A fixed baud rate UART serial transceiver, can realize serial transceiver, can achieve 9600 baud rate serial communication, and can communicate with PC
eetop.cn_串口Verilog程序(已验证)
- 基于Verilog编写的串口通信协议模块(Serial communication protocol module based on Verilog)
tx_interface_project
- 带FIFO的串口发送模块，简单的FPGA串口发送模块(Serial transmission module with FIFO)