搜索资源列表
pll_base_second
- 二阶锁相环的基本MATLAB仿真模型 说明了二阶环对频率阶跃的有效跟踪-second-order PLL basic MATLAB simulation model shows the second part of the effective frequency tracking Step
lmx2325-test
- PLL-LMX2325 C程序,用于锁相环频率控制-PLL-LMX2325 C procedures for the PLL frequency control
pllset
- 三星的有关ARM9的S3C 系列的PLL频率设置软件，ARM开发中可以快速设置所需要的频率参数-Samsung's S3C the ARM9 series of PLL installed software, ARM development can quickly set up the required frequency parameters
Template
- C8051F120的串口通信，有命令格式，有超时检测，有校验和功能，使用了PLL提升了系统频率。经过测试。有端口和使用说明文件，工程文件完整，移植方便。使用下面的功能：UART RS232 PLL GPIO Timer-C8051F120 serial communication, a command format, a time-out detection, a checksum function, use the PLL to enhance the system frequency. Te
frequencySynthesis
- 频率合成器环路滤波器的设计，介绍由集成锁相芯片PE3236 和集成锁相芯片ADF4107 组成的单环锁相环常用的环路滤波器。-Frequency synthesizer loop filter design, introduced by the integrated phase-locked-chip phase-locked PE3236 and an integrated single-chip component Central ADF4107 PLL loop filter common
pll
- 关于数字锁相环方面的代码,觉得还可以，或许对大家有用-the code of the pll
Pllrrrr
- 锁相环（非科斯塔斯环） 对波动频率进行锁定，并且对信号进行解调。画图7个显示过程及参数-The phase locked loop(PLL),adjusts the phase of a local oscillator.the phase of the incoming signal is locked and the signal is demodulated show the process and references in 7 figures
pll
- 一个实现任意倍频的，输入参考频率未知的pll，已综合实现-frequency multiple rely on dpll，unknown reference input clock
Magnetic
- 磁珠专用于抑制信号线、电源线上的高频噪声和尖峰干扰，还具有吸收静电脉冲的能力。磁珠是用来吸收超高频信号，像一些RF电路，PLL，振荡电路，含超高频存储器电路（DDR SDRAM，RAMBUS等）都需要在电源输入部分加磁珠，而电感是一种蓄能元件，用在LC振荡电路，中低频的滤波电路等，其应用频率范围很少超过50MHZ。-Inhibition of signal lines dedicated to beads, the power line frequency noise and interfere
plltest_04_04
- 对讲机锁相环数据送入，自动装载频率表对初学者有帮助-pll data write to radio
dds_AD9834+rw
- dds9834通信控制,配i和FPGA控制和pll可以得到频率的捷变(dds9834 communication control, with I and FPGA control and PLL can get frequency agility)