使用Verilog实现全数字的16QAM调制器，假设载波的频率为1MHz，数据比特率为100kbit/s.包括源代码和testbench-use verilog to realize 16qam,carrier frequency is 1MHz,data rate is 100kbit/s.including source code and testbench

内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging

verilog实现串口通讯，包括verilog代码和testbench代码-verilog serial communication, including the verilog code and testbench Code