搜索资源列表
uart
- 串口通讯 PC发送FPGA接受后回传 verilog语言-uart verilog
uartnew
- 好用的UART通信源码，使用Verilog 编写 在QUARTUS下完成，并用ModelSim仿真通过-Source-to-use UART communications, the use of Verilog in Quartus to complete the preparation and use of ModelSim simulation through
UART_FPGA_Code
- UART FPGA实现过程文档说明，及VERILOG HDL 代码，希望能帮助有需要的人，-UART FPGA implementation process documentation, and VERILOG HDL code, hoping to help people in need, thank you
UART
- 用verilog编写的UART串口通信程序，经验证误码率为0，系统由ARM控制FPGA的串口进行通信；-Written in verilog UART serial communication procedures, proven error rate is 0, the system controlled by ARM FPGA serial communication
uart_rx
- a verilog code to receive data in uart standard
uart
- 串口发送接收模块，verilog语言，可用来做hdl设计的仿真(used for test for Uart interface in FPGA)