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UART_receiver
- 通用串口收发器的移位寄存器 是verilog hDl编写-uart_reg
kkk
- atmega8 AVR串口接收做移位寄存器,然后做18位PWM输出-atmega8 AVR serial port to receive shift register to do and then do 18-bit PWM output
Communication-detection
- 通讯检测.两个移位寄存器值进行对比,一致则通讯异常,红色灯亮,不一致则通讯正常,绿色灯亮-Communication detection. Two shift register value comparison consistent communications abnormal, red lights, inconsistent communication normally green lights