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liuVHDL.rar
- 一种基于状态机设计的串并行转换电路,将LTC1196(ADC)的串行输出数据转换成并行数据的转换电路, ADC的时钟由转换电路提供,,Design a state machine based on parallel conversion circuit of the series will be LTC1196 (ADC) output of the serial data into parallel data conversion circuit, ADC clock provided by
uart
- 串口通讯rs232,时钟频率为40Mhz,波特率为19200,没有奇偶校验,在xilinx XC3S200A板子上验证过.-Serial communication rs232, clock frequency of 40Mhz, the baud rate to 19200, no parity, in the board on xilinx XC3S200A verified.
liuVHDL
- 一种基于状态机设计的串并行转换电路,将LTC1196(ADC)的串行输出数据转换成并行数据的转换电路, ADC的时钟由转换电路提供,-Design a state machine based on parallel conversion circuit of the series will be LTC1196 (ADC) output of the serial data into parallel data conversion circuit, ADC clock provided by
