交织的硬件实现，VERILOG编写的，很有参考价值-Interwoven hardware implementation, VERILOG written of great reference value to

码数控振荡器相位累加器的位数N为32,利用verilog HDL语言在Quartus II 9.1中具体实现了载波和码NCO的设计。,The code numerically controlled oscillator phase accumulator bits N 32 verilog HDL language in the concrete realization of the design of the carrier and code NCO Quartus II 9.1.