搜索资源列表
bit_intealeaver1
- verilog HDL语言实现dvb_t中的比特交织器源代码描述-verilog HDL language dvb_t the bit interleaver source code Descr iption
sampleverilog
- 图像采集、存储控制verilog源代码
ldpc_encoder_802_3an.v
- LDPC 编码的Verilog源代码,我没有验证,不知道效果如何,与大家分享,供大家参考。
sram_saa1117verilog
- 图像采集、存储控制verilog源代码,fpga控制SAA1117,采集数据存储到sram,仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
audio_verilog
- 这个是关于音频方面的SOPC设计,这个源代码是软硬件协同设计,包括verilog和C语言设计两个部分,验证,可以通过。-This is about the audio side of SOPC design, the source code is the hardware and software co-design, including verilog and C language design two parts, verification, you can.