搜索资源列表
chengxu(vhdl)
- 这是用VHDL编写的FPGA与计算机进行串口通信的程序和一个LED程序-VHDL and FPGA prepared by the computer serial communication procedures and an LED procedures
uart-verilog-vhdl
- 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
UART vhdl代码
- 基于FPGA的异步串口通信
RS232串口通信协议
- RS232串口通信协议，verilog实现，通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
FPGACOM.rar
- FPGA编程实现串口通信，源代码全。包括仿真程序。,FPGA programming serial communications, the entire source code. Including the simulation program.
uart.zip
- uart串口通信程序，用状态机实现的；测试通过，并且实践过,uart
UART
- 利用FPGA接受232芯片的串口数据，可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
serial
- -- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在 --PC机上安装一个串口调试工具来验证程序的功能。 -- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 --制器，10个bit是1位起始位，8个数据位，1个结束 --位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实 --现相应的波特率。程序当前设定的div_par 的值是0x104，对应的波特率是 --9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时
UART_VHDL
- 异步串口通信VHDL源代码，通过了验证，最高通信速率可达384-Asynchronous serial communication VHDL source code, through the validation, the maximum communication rate of up to 384
serial
- 基于VHDL的串口通信 基于VHDL的串口通信-VHDL-based serial communication based on VHDL Serial Communication
UART_SUCCESS
- 实现FPGA和上位机的串口通信，里面由波特率发生器，移位寄存器，计数器，detecter,switch,switch_bus等功能块综合而成。-FPGA implementation and the host computer' s serial communication, which by the baud rate generator, shift register, counters, detecter, switch, switch_bus such as function bl
uartverilog
- 实现cpld和pc机之间的串口通信，PC机传送到CPLD的信息，CPLD传回到PC机-Via verilog language ，cpld can communcate with pc.
rs232
- 通过FPGA实现串口通信，结果在超级终端可见-Serial communication through the FPGA, the result can be seen in the HyperTerminal
chuankou
- FPGA和单片机的串口通信资料，本代码是用VHDL写的。-FPGA and the microcontroller serial communication of information, the code is written in VHDL.
uart_0910
- uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of fr
UART
- 用FPGA开发的串口通信的程序，代码是用verilog编写的，希望对大家有用！-Serial communication with the FPGA development process, the code is written in verilog and hope for all of us!
FPGA
- 使用VHDL实现的串口通信程序，主要完成利用串口收发数据等功能 -Using the VHDL implementation of the serial communication program, primarily the completion of functions such as send and receive data using serial port
FPGA-UART
- 该资料是实现VHDL的串口通信(UART)，RS232接口协议，-VHDL implementation of serial communication
rs232
- 使用VHDL语言在vivado平台上编的串口通信的完整工程，并能用EGO1开发板成功验证(The complete project of serial communication is compiled on the vivado platform using VHDL language, and it can be successfully verified with the EGO1 development board.)