搜索资源列表
rs232
- dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过.
很好的RS232源代码
- 用verilog语言写的串口程序。
RS232串口通信协议
- RS232串口通信协议，verilog实现，通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
rs232
- 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
URAT
- Verilog硬件描述语言，RS232串口发送接收程序-Verilog hardware descr iption language, RS232 serial port send and receive program
RS232_project
- 串口通讯 rs232 verilog程序，一次接受传送8bits-rs232 verilog project，reciver or trancimiter 8 bits onece
RS232
- RS232_串口通信的发送端verilog源程序代码-RS232_ serial communication sender verilog source code
rs232
- RS232的串口控制器，本程序中的每个小模块都有与之对应的testbench，模块清晰，实现结构简单。很适合Verilog编程初学者来练习！-RS232 serial port controller, the program has a small module for each corresponding testbench, module definition, to achieve simple structure. Verilog programming is suitable for
PS2RS232
- 这是关于PS2和rs232串口的代码，verilog的，是深入了解串口的好的学习实例。-good code about rs232 and ps2
rs232-Quartus
- 利用verilog語法,來達成串口rs232的功能-Using verilog syntax, to achieve the functions of serial rs232
rs232
- 本设计是PC和FPGA的串口通信的程序，用的是VERILOG语言，调试成功，用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
verilog串口收发模块程序
- 基于verilogHDL语言的RS232串口收发模块程序
rs232
- rs232串口通信实验4位的串口，verilog源代码。-rs232 serial communication experiment 4 serial, verilog source code
rs232
- verily 串口rs232代码，可参数化波特率-uart code in verilog
UART-Altera
- 使用Atera FPGA CycloneII 实现串口通信，遵循RS232协议。FPGA上的模块实现了数据的接收，取补码和发送。(Achieve serial communication with FPGA, following the protocol of RS232.)
RS232
- 基于quartusii的用verilog编写的rs232串口程序(QuartusII based on Verilog prepared by the RS232 serial procedures)
UART1
- 基于Verilog的串口RS232控制器(RS232 controller of serial port based on Verilog)
No.201710061347=UART_Verilog
- 1.硬件平台： FPGA； 2.编程语言： Verilog； 3.串口通信RS232的Verilog实现版本；(1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;)
uart
- 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。 使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)