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FPGA-basedimplementationoftherootraisedcosine
- 基于FPGA实现根升余弦滤波器的研究(在MATLAB环境中)-FPGA-based implementation of the root raised cosine filter (in the MATLAB environment)
Square-Root-Raised-Cosine-Filter
- 根升余弦基带成形滤波器的设计及其DSP实现.最后利用系数对称特性,在某软件无线电电台系统的DSP 芯片中编程, 实现均方根升余弦滤波器的成形滤波算法-First this essay introduces baseband shaped filter theory and requirements of an SDR system on shaped filtering. And, the author introduces various realization methods
zuoye2
- 主要编写了一组二进制数据通过根升余弦滤波器后的波形,但并没有使用ISE内部的FIR滤波器内核,该程序相当于编写了一个根升余弦滤波器。-Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the prepara
QPSK_DSSS
- 该程序使用verilog语言,编写了QPSK-DSSS系统的发端,主要模块包括对同相分量和正交分量的扩频,通过根升余弦滤波器,以及与载波相乘等模块。-The program uses the verilog language, written QPSK-DSSS system, the originator, the main modules include in-phase and quadrature components of the spectrum, through the root