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vhdl1.rar
- 设计一个四路数据选择器,其功能是将四组不同的数据按要求选择一个输出.输出的那组数据有两个控制信号决定,其真值表如下: 数据选择控制端 输出的数据 Input0 Input1 output 0 0 output0 0 1 output1 1 0 output 2 1 1 output 3
zzb
- 这是一个驱动大功率电机的控制模块，真值表是我亲自测试出来的，可用
av-p06a.rar
- 型号: AV-P06A 5.1CH功率放大器 89C52+12M+PT2314+PT2315+2*M62429+PT6311+CS16210+6221+VFDGDT1313A,包含VFD真值表手册资料,Model: AV-P06A 5.1CH power amplifier 89C52+ 12M+ PT2314+ PT2315+ 2* M62429+ PT6311+ CS16210+ 6221+ VFDGDT1313A, truth table VFD manual contains infor
vhdl1.rar
- 设计一个四路数据选择器,其功能是将四组不同的数据按要求选择一个输出.输出的那组数据有两个控制信号决定,其真值表如下: 数据选择控制端 输出的数据 Input0 Input1 output 0 0 output0 0 1 output1 1 0 output 2 1 1 output 3, Designs four ways according to the selector, its function is chooses four groups of different data accor
lab1_VHDL
- VHDL数字系统设计工程实践，包含实验的原理，真值表和结构图描述，以及相关的VHDL代码。-VHDL digital system design engineering practice, including the principle of the experiment, truth table and chart descr iptions, and associated VHDL code.
lab2_VHDL
- VHDL数字系统设计和工程实践1，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
EDA.DAC8812
- DAC8812英文资料，内容非常详细。真值表，时序图，电气特性等。-DAC8812 information in English, the content is very detailed.
state_machine
- 三进程有限状态机的设计程序，内附有AD574逻辑控制真值表以及采样状态机的原理图-Third, the process of finite state machine design process, logic control of typhoons and rainstorms are AD574 truth table, as well as sampling state machine schematic
74HC595-Application-with-MC51
- 595——8位数码管循环移位显示.doc │ 利用74HC595实现多位LED显示的新方法.doc │ 用74HC595芯片驱动LED的电路设计.pdf │ 文件目录表绘制.cmd │ 文件夹目录.txt │ 文件名目录.txt │ ├─点阵设计 │ 74HC595PW.pdf │ 正文点阵设计.doc │ ├─Use595_4(Alexi) │ Use595_2.c │ Use595_4.hex │ Use595_4(Alexi).
4511
- 4511介绍包含引脚 逻辑图 真值表 功能图-4511 introduced the truth table contains the pin function chart logic diagram, etc.
Scm002
- HT1621驱动一款LCD～不管主要是处理真值表的方法-HT1621-driven LCD ~ regardless of a major method of dealing with truth table
lab3_VHDL
- VHDL数字系统设计和工程实践2，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
lab4_VHDL
- VHDL数字系统设计和工程实践2，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
lab5_VHDL
- VHDL数字系统设计和工程实践3，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, 3, including the principles, truth table and schematic, as well as VHDL source code.
lab6_VHDL
- VHDL数字系统设计和工程实践5，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice 4, including the principles, truth table and schematic, as well as VHDL source code.
lab7_VHDL
- VHDL数字系统设计和工程实践6，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, six, including the principles, truth table and schematic, as well as VHDL source code.
seven
- 基于VHDL实现输入控制7段数码管的代码，分别用逻辑表达式法和真值表法实现。-VHDL-based implementation of digital control input control 7-segment code, respectively, a logical expression method and truth table method to achieve.
7SEG-VHDL
- 7段数码管的设计与实现 用真值表法和逻辑表达式两种-7 Design and implementation of digital control and logic expressions with a truth table of two
bb
- 2选1的数据选择器 实现2选1的电路功能，其真值表和电路符号如下图所示。即当s＝1时，输出m＝y；当s＝0时，输出m＝x。 -2 Select a data selector circuit to achieve 2 S 1 function, its truth table and circuit symbols shown below. That is, when s = 1, the output m = y when s = 0, the output m = x.
tec-xp+基本指令和扩展指令
- 29条基本指令和clc jrns calr扩展指令真值表，适用于tec-xp+16位教学机，通过编译软件编译，写入match芯片(tec-xp+16 29basic clc jrns calr match chip)