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Giga8b10b v10
- 可编程器件厂商Altera出品的8b10b编码器，用在现在通用的PCI－Express接口中，包含完全解密的源程序。-Altera programmable device manufacturers buy 8b10b encoder, now with the generic PCI-Express interface, including full decryption of the source.
8b10b_Encoder
- 应用VHDL设计的8b10b 编码器，对串行数据的高速传输有用。-application VHDL design 8b10b encoding device to the high-speed serial data transmission useful.
8b10b_encdec
- VHDL写的8B10B编码解码器的实现，在Xilinx平台通过验证。
AteralIP.rar
- Altera IP核8B10B编码器的完整设计流程包括Altera IP的定制、仿真和实现的全过程,Altera IP core of the integrity of the 8B10B encoder design process, including the Altera IP customization, simulation and realization of the whole process of
8b10b_encdec.rar
- 8b10b转换编码、解码verilog源代码,8b10b transcoding, decoding verilog source code
8b10b
- 如题,原始8B10B编码，仿真通过。真麻烦，要说那么多废话-as title
encode_8bl0b
- 8b10b的verilog编码程序，已经验证过没有问题，效果比以前的要好-8b10b the verilog coding process has been proven there is no problem, the effect is better than before
8B10B编码
- 8B10B编码的verilog源代码，已经通过仿真验证
8B10B
- 基于VHDL的双校验位8B10B编码系统的设计，对于学习VHDL语言有一定的帮助-VHDL-based dual-parity bit 8B10B coding system for learning VHDL, there is some help
Project
- 熟悉Altera IP的产生和实现方法定制一个8B10B编码器- 8B10B codeer
Altera_IP_verilog
- Altera IP的产生与实现。定制一个8B10B编码器，采用verilog语言建立仿真模型，并验证。-Altera IP generation and implementation. Customize a 8B10B encoder, using verilog language, a simulation model, and verify.
8b10b_encdec
- 8b10b编码模块的设计，用vhdl语言仿真-8b10b coding module design, simulation using vhdl language
1v1dTX
- 实现1路视频采集，1路反向数据，发射端源码， 采用8b10b编码。-To achieve a video capture, 1 reverse data transmitter source, Using 8b10b code.
Example-b4-2
- 利用硬件可编程语言VHDL 来实现定制一个8B10B编码器-use VHDL language to 8B10B
8b10b_encdec_latest.tar
- 此文件为8b10b编码的测试程序，可以直接进行仿真。其中包括编码，解码的完整代码。-This file 8b10b encoding test program can be directly simulated. Including encoding, decoding the complete code.
8b10encode
- 8b10b编码器是设计高速数据发送的重要编码方式，其中有源代码还有具体设计文档-8b10b encoder design of high-speed data transmission encoding, including source code, there are specific design documents
8b10b_encdec_latest.tar
- 8b10b编码的FPGA ipcore, 8b10b编码的FPGA ipcore-The 8b10b encoding of FPGA ipcore of 8b10b coding-FPGA ipcore, 8b10b coding the FPGA ipcore of
encoder-8b10b
- 可以实现8b10b编码，verilog源程序，经过测试-8b10b Encoder
ed8b10b_example
- vhdl语言编写，quartus软件调试，8b10b编码的源程序-VHDL language, Quartus software debug, 8b10b encoded source
8B10B
- 以太网PHY层中的组成部分 8B10B编码器-Part of the Ethernet PHY layer in 8B10B encoder