搜索资源列表
AD9512_VHDL
- FPGA通过SPI总线控制Analog公司的射频时钟分配芯片的程序，在需要用到高速时钟（GHz）的电路中经常采用，比如数据采集卡及信号回放卡中会经常用到该功能，已经在产品中得到验证，工作稳定。-The VHDL code of controlling AD9512 of Analog Device
main
- pic18f22通过SPI协议对AD9512分频控制程序-Pic18f22 through SPI protocol controls AD9512 points frequency procedures
control_fenpin
- 用spartan3对芯片AD9512通过SPI协议进行分频设置-spartan3 controls chip AD9512 divider Settings through the SPI protocol
AD9512_test
- 该程序包实现时钟芯片AD9512调试，完整的程序包(Clock chip AD9512 debugging, achieve use successfully)
AD9512_coe
- AD9512 提供多路输出时钟分配功能，输入信号最高可达1.6 GHz。它具有低抖动和低相位噪声特性，能够极大地提升数据转换器的时钟性能。(AD9512 provide multiplexed output clock distribution function, the input signal of up to 1.6 GHz.It has a low jitter and low phase noise characteristics, can greatly promote the cl
AD9512_ISE
- AD9512提供多路输出时钟分配功能，输入信号最高可达1.6 GHz。它具有低抖动和低相位噪声特性，能够极大地提升数据转换器的时钟性能。(AD9512 provide multiplexed output clock distribution function, the input signal of up to 1.6 GHz.It has a low jitter and low phase noise characteristics, can greatly promote the clo