搜索资源列表
P-v-dianyabiao
- PC数字电压表的设计,原理图以及代码,设计文档.此数字电压表的优势在于可以通过串口将测量所得到的电压值传给PC机,这样的话有利用整个数据的采集与分析.上位机采取的是串口通信软件.-PC digital voltage meter design, diagram and code, Design Documentation. This figure voltage meter advantage is through the serial port will be measured by the
CU.v
- 用vlog语言编写的cpu控制器源代码，用于fpga的硬件编程实验-vlog language used in the preparation of cpu controller source code for programming fpga hardware experiments
vga.niosII.compent.v
- 在cyloneIIFPGA平台下设计完成测试通过的VGA控制器代码。显存留在系统的SDRAM中，用FIFO作为缓冲。-in cyloneIIFPGA platform design is completed tests through the VGA controller code. RAM in the system SDRAM, and use as a FIFO buffer.
v
- Verilog写的二分频电路代码，FPGA，实现将输入时钟信号的频率变成原来的1/2-Write Verilog code for the second divider circuit, FPGA, to achieve the frequency of the input clock signal into the original 1/2
license
- FreeScale CodeWarrior for PowerPC V 8.8 License
uCOS-II-V-280
- ucosII的源代码。版本2.8.全功能。-UCOS_ii source code, all functions are,, do not delete, support a lot of single-chip microcomputer, version 2.8
ad9910
- 单片机控制dds芯片ad9910的参考代码，适合初学者。-SCM control dds chip ad9910 reference code, suitable for beginners.
FPGA_Code_and_training_materials
- 压缩包内包含了：FPGA设计初级班和提高班培训课堂PPT；实验的源代码；实验指导书！-Compressed packet contains: FPGA design of the primary classes and training classes improve classroom PPT experiment' s source code experimental guide book!
Ligong-easyarm2200-week-test-platform-code-Chapter
- 周立功easyarm2200平台第5章试验代码-Ligong-easyarm2200-week-test-platform-code-Chapter-V
Verilog-HDL-code
- verilog 经典例子的源码 非常适用于初学verilog的朋友们-classic example of verilog source code
DE2_LCM_CCD
- DE2 CCD数码相机源代码，下载即可使用。方便学习。-DE2 CCD digital camera source code, you can use to download. Facilitate learning.
Easy_51Pro_v20
- Easy 51Pro串行编程器，单片机编程器详细的原理教程和程序源码，及相关软件。-The konwledge of programmer and it s source code.
deshpande151.ZIP
- HEX2SBC.C : Boot Loader code for loading Intel standard Hex filesto 8051 SBC. This code is Copyright material of P P Deshpande and V P Bhanage. You may freely use this code as it is for educational purpose. However commercial use requires permi
code
- 代码文件夹： ARVI_FSM.v为顶层文件，用于模拟时用。 dataHex.dat 为模拟输入文件（只有10行，象征的意思。实际我们模拟时，dataHex.dat文件足有1个多GB） dataFormat.dat为输入文件对应的带格式的文件 使用modelsim模拟时，将dataHex.dat名字改为CPUContext.txt 结果: result.txt -Code folder: ARVI_FSM.v for top-level documen
xapp460
- xilinx hdmi tx rx verilog code
fifo_test.v.tar
- code for implementing high speed fifo for apturing data from fpga-code for for implementing high speed fifo for apturing data from fpga
Vga
- The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen
IIC_slave_code
- I2C slave 代码，可以完成从机功能-about I2C slave code about I2C slave code
v
- verilog code for a synthesizer based on Terasic s Multimedia development board. (MTDB) and Altera FPGA.
USB-2.0-source-code-by-VHDL
- 实现USB2.0，采用VHDL编写，源代码已按类分好-USB 2.0 source code by VHDL