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MUX
- mux realize by fpga mux realize by fpga
mux
- 多路选择器 verilog CPLD EPM1270 源代码-MUX source verilog CPLDEPM1270
mux
- 多路选择器是一个多输入，单输出的组合逻辑电路，在算法电路的实现中常用来根据地址码来调度数据。-MUX is a multi-input, single-output combinational logic circuit, in the algorithm used in the realization of circuits to address code in accordance with scheduling data.
Electronic-Design-Automation
- 用vhdl语句描述4位等值比较器，4选1多路选择器，8位奇偶校验电路功能-VHDL language used to describe the equivalent four comparators, 4 election more than one MUX, 8-bit parity circuit functions
mux21a
- 2选1多路选择器的VHDL完整描述，即可以直接综合出实现相应功能的逻辑电路及其功能器件。图6-1是此描述对应的逻辑图或者器件图-2 election more than one MUX complete descr iption of the VHDL, which can be directly integrated to achieve the corresponding function logic devices and their functions. Figure 6-1 is th
mux21
- 一个比较简单的2选1多路选择器，初学者可以借以熟悉软件-A relatively easy one of the 2 election MUX, beginners can be so familiar with the software
veriloghdl
- 多路选择器（MUX）verilog hdl 多路选择器（MUX）verilog hdl-MUX (MUX) verilog hdl multiplexer (MUX) verilog hdl
mux
- A Mux example written in VHDL.
4_1
- 4 选1 多路选择器-4 to 1 MUX ========
mux
- the multiplexer program are designed 2:1 and 4:1 in verilog model
MUX
- source s file of multiplexor
finallab
- introduction to veri well and behaviural modeling code for 4 to 1 mux
vhdlcodes4
- VHDL coding for 4X1 mux in behavioural modelling and for 16X1 mux in structural modelling.
MUX
- VHDL Code for 4:1,2:1 MUX using when statment
mux16_1
- VHDL code foe 16:1 MUX using structural modelling
ConfigurationofVxWorks
- VxWorks网络驱动配置及分析 VxWorks支持两种形式的网络驱动,一种是BSD驱动支持通用的BSD4.4网络,API,结构等和大多数BSD网络的驱动类似.另一种是END网络驱动,是VxWorks独有的,根据VxWorks MUX接口编程,不过END驱动在底层也要转换成BSD的形式.-Configuration of VxWorks network driver
4x1_mux
- this a simple Verilog source code for 4X1 mux.-this is a simple Verilog source code for 4X1 mux.
Circuit-modeling-mux
- 电路建模--简单和复杂的Mux建模思想 信号，表达式等-Circuit modeling- simple and complex signals Mux modeling thought, expression, etc.
mux
- mux选通，每两个输入，通过选择输出其中一个信号-gated mux, each of the two inputs, one output signal by selecting
3bit-Wide-5to1-Mux
- 3bit Wide 5to1 Mux by verilog